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@@ -78,7 +78,7 @@ void SetAsynchMode (void)
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static u32 mc9328sid;
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static u32 mc9328sid;
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-int board_init (void)
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+int board_early_init_f(void)
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{
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{
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volatile unsigned int tmp;
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volatile unsigned int tmp;
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@@ -112,10 +112,6 @@ int board_init (void)
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SetAsynchMode ();
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SetAsynchMode ();
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- gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
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-
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- gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
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-
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icache_enable ();
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icache_enable ();
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dcache_enable ();
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dcache_enable ();
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@@ -133,6 +129,15 @@ int board_init (void)
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return 0;
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return 0;
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}
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}
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+int board_init(void)
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+{
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+ gd->bd->bi_arch_number = MACH_TYPE_MX1ADS;
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+
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+ gd->bd->bi_boot_params = 0x08000100; /* adress of boot parameters */
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+
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+ return 0;
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+}
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+
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int board_late_init (void)
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int board_late_init (void)
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{
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{
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@@ -161,12 +166,18 @@ int board_late_init (void)
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return 0;
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return 0;
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}
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}
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-int dram_init (void)
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+int dram_init(void)
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+{
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+ /* dram_init must store complete ramsize in gd->ram_size */
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+ gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
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+ PHYS_SDRAM_1_SIZE);
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+ return 0;
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+}
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+
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+void dram_init_banksize(void)
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{
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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-
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- return 0;
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}
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}
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#ifdef CONFIG_CMD_NET
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#ifdef CONFIG_CMD_NET
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