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@@ -1,5 +1,5 @@
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/*
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/*
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- * Copyright (C) 2009-2010 Freescale Semiconductor, Inc.
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+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
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*
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*
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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* project.
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* project.
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@@ -35,6 +35,9 @@
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#define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */
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#define CONFIG_FSL_ELBC 1 /* Has Enhance localbus controller */
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+#define CONFIG_SYS_SRIO
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+#define CONFIG_SRIO1 /* SRIO port 1 */
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+
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#define CONFIG_PCI 1 /* Disable PCI/PCIE */
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#define CONFIG_PCI 1 /* Disable PCI/PCIE */
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#define CONFIG_PCIE1 1 /* PCIE controller */
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#define CONFIG_PCIE1 1 /* PCIE controller */
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#define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */
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#define CONFIG_FSL_PCI_INIT 1 /* use common fsl pci init code */
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@@ -355,9 +358,10 @@ extern unsigned long get_clock_freq(void);
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#define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000
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#define CONFIG_SYS_PCIE1_IO_PHYS 0xe2800000
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#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */
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#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000 /* 8M */
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-#define CONFIG_SYS_SRIO_MEM_VIRT 0xc0000000
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-#define CONFIG_SYS_SRIO_MEM_BUS 0xc0000000
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-#define CONFIG_SYS_SRIO_MEM_PHYS 0xc0000000
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+#define CONFIG_SYS_SRIO1_MEM_VIRT 0xC0000000
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+#define CONFIG_SYS_SRIO1_MEM_BUS 0xC0000000
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+#define CONFIG_SYS_SRIO1_MEM_PHYS CONFIG_SYS_SRIO1_MEM_BUS
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+#define CONFIG_SYS_SRIO1_MEM_SIZE 0x20000000 /* 512M */
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#ifdef CONFIG_QE
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#ifdef CONFIG_QE
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/*
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/*
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