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@@ -317,7 +317,6 @@ int cpu_init_r(void)
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volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
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volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
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volatile uint cache_ctl;
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volatile uint cache_ctl;
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uint svr, ver;
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uint svr, ver;
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- uint l2srbar;
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u32 l2siz_field;
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u32 l2siz_field;
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svr = get_svr();
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svr = get_svr();
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@@ -385,8 +384,8 @@ int cpu_init_r(void)
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if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) {
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if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) {
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puts("already enabled");
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puts("already enabled");
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- l2srbar = l2cache->l2srbar0;
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#if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE)
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#if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE)
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+ u32 l2srbar = l2cache->l2srbar0;
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if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE
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if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE
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&& l2srbar >= CONFIG_SYS_FLASH_BASE) {
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&& l2srbar >= CONFIG_SYS_FLASH_BASE) {
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l2srbar = CONFIG_SYS_INIT_L2_ADDR;
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l2srbar = CONFIG_SYS_INIT_L2_ADDR;
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