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@@ -335,6 +335,7 @@
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#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
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#define CONFIG_SYS_FSL_ERRATUM_USB14
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#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
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+#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
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#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
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#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
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#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
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@@ -368,6 +369,7 @@
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#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
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#define CONFIG_SYS_FSL_ERRATUM_USB14
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#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
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+#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
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#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
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#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
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#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
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@@ -445,6 +447,7 @@
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#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
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#define CONFIG_SYS_FSL_ERRATUM_USB14
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+#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
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#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
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#define CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER
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#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
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