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@@ -199,8 +199,6 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs,
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temp_sdram_cfg = in_be32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI;
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temp_sdram_cfg = in_be32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI;
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out_be32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
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out_be32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
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asm volatile("sync;isync");
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asm volatile("sync;isync");
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- while (!(in_be32(&ddr->debug[1]) & 0x2))
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- ;
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/* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done. */
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/* Poll DDR_SDRAM_CFG_2[D_INIT] bit until auto-data init is done. */
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while (in_be32(&ddr->sdram_cfg_2) & 0x10) {
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while (in_be32(&ddr->sdram_cfg_2) & 0x10) {
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