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@@ -41,6 +41,7 @@ static inline void invalidate_l2_cache(void)
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void l2_cache_enable(void);
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void l2_cache_enable(void);
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void l2_cache_disable(void);
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void l2_cache_disable(void);
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+void set_section_dcache(int section, enum dcache_option option);
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/*
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/*
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* The current upper bound for ARM L1 data cache line sizes is 64 bytes. We
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* The current upper bound for ARM L1 data cache line sizes is 64 bytes. We
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