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@@ -3,7 +3,7 @@
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* Stelian Pop <stelian.pop@leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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- * Configuation settings for the AT91SAM9260EK board.
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+ * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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@@ -28,18 +28,26 @@
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#define __CONFIG_H
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/* ARM asynchronous clock */
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-#define AT91_CPU_NAME "AT91SAM9260"
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#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
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-#define AT91_MASTER_CLOCK 100000000 /* peripheral */
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-#define AT91_CPU_CLOCK 200000000 /* cpu */
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#define CONFIG_SYS_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
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#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
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#define AT91_SLOW_CLOCK 32768 /* slow clock */
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#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
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+
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+#ifdef CONFIG_AT91SAM9G20EK
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+#define AT91_CPU_NAME "AT91SAM9G20"
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+#define AT91_MASTER_CLOCK 132000000 /* peripheral */
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+#define AT91_CPU_CLOCK 396000000 /* cpu */
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+#define CONFIG_AT91SAM9G20 1 /* It's an Atmel AT91SAM9G20 SoC*/
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+#else
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+#define AT91_CPU_NAME "AT91SAM9260"
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+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
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+#define AT91_CPU_CLOCK 200000000 /* cpu */
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#define CONFIG_AT91SAM9260 1 /* It's an Atmel AT91SAM9260 SoC*/
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-#define CONFIG_AT91SAM9260EK 1 /* on an AT91SAM9260EK Board */
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+#endif
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+
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#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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@@ -101,7 +109,12 @@
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
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#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */
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#define AT91_SPI_CLK 15000000
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+
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+#ifdef CONFIG_AT91SAM9G20EK
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+#define DATAFLASH_TCSS (0x22 << 16)
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+#else
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#define DATAFLASH_TCSS (0x1a << 16)
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+#endif
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#define DATAFLASH_TCHS (0x1 << 24)
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/* NAND flash */
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