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@@ -28,13 +28,13 @@
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#include <nand.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/io.h>
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-#include <fsl_nfc.h>
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+#include "mxc_nand.h"
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#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
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-static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
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+static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR;
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#elif defined(MXC_NFC_V3_2)
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-static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;
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-static struct fsl_nfc_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;
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+static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;
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+static struct mxc_nand_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;
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#endif
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static void nfc_wait_ready(void)
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@@ -68,7 +68,7 @@ static void nfc_nand_init(void)
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tmp = (readnfc(&nfc_ip->config2) & ~(NFC_V3_CONFIG2_SPAS_MASK |
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NFC_V3_CONFIG2_EDC_MASK | NFC_V3_CONFIG2_PS_MASK)) |
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- NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_SPARE_SIZE / 2) |
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+ NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_OOBSIZE / 2) |
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NFC_V3_CONFIG2_INT_MSK | NFC_V3_CONFIG2_ECC_EN |
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NFC_V3_CONFIG2_ONE_CYCLE;
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if (CONFIG_SYS_NAND_PAGE_SIZE == 4096)
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@@ -81,7 +81,7 @@ static void nfc_nand_init(void)
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* if spare size is larger that 16 bytes per 512 byte hunk
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* then use 8 symbol correction instead of 4
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*/
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- if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
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+ if (CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16)
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tmp |= NFC_V3_CONFIG2_ECC_MODE_8;
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else
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tmp &= ~NFC_V3_CONFIG2_ECC_MODE_8;
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@@ -102,7 +102,7 @@ static void nfc_nand_init(void)
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int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
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int config1;
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- writenfc(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
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+ writenfc(CONFIG_SYS_NAND_OOBSIZE / 2, &nfc->spare_area_size);
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/* unlocking RAM Buff */
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writenfc(0x2, &nfc->config);
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@@ -115,7 +115,7 @@ static void nfc_nand_init(void)
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* if spare size is larger that 16 bytes per 512 byte hunk
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* then use 8 symbol correction instead of 4
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*/
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- if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
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+ if (CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16)
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config1 &= ~NFC_V2_CONFIG1_ECC_MODE_4;
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else
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config1 |= NFC_V2_CONFIG1_ECC_MODE_4;
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@@ -204,7 +204,7 @@ static int nfc_nand_check_ecc(void)
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#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
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u32 ecc_status = readl(&nfc->ecc_status_result);
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int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
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- int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;
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+ int err_limit = CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16 ? 8 : 4;
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int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512;
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do {
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@@ -332,14 +332,6 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
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return 0;
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}
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-#if defined(CONFIG_ARM)
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-void board_init_f (ulong bootflag)
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-{
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- relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
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- CONFIG_SYS_TEXT_BASE);
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-}
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-#endif
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-
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/*
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* The main entry for NAND booting. It's necessary that SDRAM is already
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* configured and available since this code loads the main U-Boot image
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