mvgbe: add support for orion5x GbE controller

Add definitions and initialization in orion5x for mvgbe.
Add orion5x in mvgbe SoC includes.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

arch/arm/cpu/arm926ejs/orion5x/cpu.c

@@ -268,3 +268,11 @@ int arch_misc_init(void)
 	return 0;
 }
 #endif /* CONFIG_ARCH_MISC_INIT */
+
+#ifdef CONFIG_MVGBE
+int cpu_eth_init(bd_t *bis)
+{
+	mvgbe_initialize(bis);
+	return 0;
+}
+#endif

arch/arm/include/asm/arch-kirkwood/kirkwood.h

@@ -60,8 +60,10 @@
 #define KW_EGIGA0_BASE			(KW_REGISTER(0x72000))
 #define KW_EGIGA1_BASE			(KW_REGISTER(0x76000))
 
-#define MVGBE0_BASE			KW_EGIGA0_BASE
-#define MVGBE1_BASE			KW_EGIGA1_BASE
+/* Kirkwood GbE controller has two ports */
+#define MAX_MVGBE_DEVS	2
+#define MVGBE0_BASE	KW_EGIGA0_BASE
+#define MVGBE1_BASE	KW_EGIGA1_BASE
 
 #if defined (CONFIG_KW88F6281)
 #include <asm/arch/kw88f6281.h>

arch/arm/include/asm/arch-orion5x/orion5x.h

@@ -56,6 +56,10 @@
 #define ORION5X_USB20_PORT1_BASE		(ORION5X_REGISTER(0xA0000))
 #define ORION5X_EGIGA_BASE			(ORION5X_REGISTER(0x72000))
 
+/* Orion5x GbE controller has a single port */
+#define MAX_MVGBE_DEVS	1
+#define MVGBE0_BASE	ORION5X_EGIGA_BASE
+
 #define CONFIG_MAX_RAM_BANK_SIZE		(64*1024*1024)
 
 /* include here SoC variants. 5181, 5281, 6183 should go here when

drivers/net/mvgbe.c

@@ -38,6 +38,8 @@
 
 #if defined(CONFIG_KIRKWOOD)
 #include <asm/arch/kirkwood.h>
+#elif defined(CONFIG_ORION5X)
+#include <asm/arch/orion5x.h>
 #endif
 
 #include "mvgbe.h"

drivers/net/mvgbe.h

@@ -28,8 +28,6 @@
 #ifndef __MVGBE_H__
 #define __MVGBE_H__
 
-#define MAX_MVGBE_DEVS	2	/*controller has two ports */
-
 /* PHY_BASE_ADR is board specific and can be configured */
 #if defined (CONFIG_PHY_BASE_ADR)
 #define PHY_BASE_ADR		CONFIG_PHY_BASE_ADR