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@@ -71,6 +71,7 @@ static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
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{
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{
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struct eth_device *edev = eth_get_dev_by_name(dev);
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struct eth_device *edev = eth_get_dev_by_name(dev);
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struct fec_priv *fec = (struct fec_priv *)edev->priv;
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struct fec_priv *fec = (struct fec_priv *)edev->priv;
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+ struct ethernet_regs *eth = fec->eth;
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uint32_t reg; /* convenient holder for the PHY register */
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uint32_t reg; /* convenient holder for the PHY register */
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uint32_t phy; /* convenient holder for the PHY */
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uint32_t phy; /* convenient holder for the PHY */
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@@ -80,18 +81,18 @@ static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
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* reading from any PHY's register is done by properly
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* reading from any PHY's register is done by properly
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* programming the FEC's MII data register.
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* programming the FEC's MII data register.
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*/
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*/
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- writel(FEC_IEVENT_MII, &fec->eth->ievent);
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+ writel(FEC_IEVENT_MII, ð->ievent);
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reg = regAddr << FEC_MII_DATA_RA_SHIFT;
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reg = regAddr << FEC_MII_DATA_RA_SHIFT;
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phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
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phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
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writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA |
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writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA |
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- phy | reg, &fec->eth->mii_data);
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+ phy | reg, ð->mii_data);
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/*
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/*
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* wait for the related interrupt
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* wait for the related interrupt
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*/
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*/
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start = get_timer(0);
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start = get_timer(0);
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- while (!(readl(&fec->eth->ievent) & FEC_IEVENT_MII)) {
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+ while (!(readl(ð->ievent) & FEC_IEVENT_MII)) {
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if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
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if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
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printf("Read MDIO failed...\n");
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printf("Read MDIO failed...\n");
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return -1;
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return -1;
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@@ -101,12 +102,12 @@ static int fec_miiphy_read(const char *dev, uint8_t phyAddr, uint8_t regAddr,
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/*
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/*
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* clear mii interrupt bit
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* clear mii interrupt bit
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*/
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*/
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- writel(FEC_IEVENT_MII, &fec->eth->ievent);
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+ writel(FEC_IEVENT_MII, ð->ievent);
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/*
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/*
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* it's now safe to read the PHY's register
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* it's now safe to read the PHY's register
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*/
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*/
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- *retVal = readl(&fec->eth->mii_data);
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+ *retVal = readl(ð->mii_data);
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debug("fec_miiphy_read: phy: %02x reg:%02x val:%#x\n", phyAddr,
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debug("fec_miiphy_read: phy: %02x reg:%02x val:%#x\n", phyAddr,
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regAddr, *retVal);
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regAddr, *retVal);
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return 0;
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return 0;
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@@ -128,6 +129,7 @@ static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
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{
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{
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struct eth_device *edev = eth_get_dev_by_name(dev);
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struct eth_device *edev = eth_get_dev_by_name(dev);
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struct fec_priv *fec = (struct fec_priv *)edev->priv;
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struct fec_priv *fec = (struct fec_priv *)edev->priv;
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+ struct ethernet_regs *eth = fec->eth;
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uint32_t reg; /* convenient holder for the PHY register */
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uint32_t reg; /* convenient holder for the PHY register */
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uint32_t phy; /* convenient holder for the PHY */
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uint32_t phy; /* convenient holder for the PHY */
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@@ -137,13 +139,13 @@ static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
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phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
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phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
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writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR |
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writel(FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR |
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- FEC_MII_DATA_TA | phy | reg | data, &fec->eth->mii_data);
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+ FEC_MII_DATA_TA | phy | reg | data, ð->mii_data);
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/*
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/*
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* wait for the MII interrupt
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* wait for the MII interrupt
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*/
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*/
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start = get_timer(0);
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start = get_timer(0);
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- while (!(readl(&fec->eth->ievent) & FEC_IEVENT_MII)) {
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+ while (!(readl(ð->ievent) & FEC_IEVENT_MII)) {
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if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
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if (get_timer(start) > (CONFIG_SYS_HZ / 1000)) {
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printf("Write MDIO failed...\n");
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printf("Write MDIO failed...\n");
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return -1;
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return -1;
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@@ -153,7 +155,7 @@ static int fec_miiphy_write(const char *dev, uint8_t phyAddr, uint8_t regAddr,
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/*
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/*
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* clear MII interrupt bit
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* clear MII interrupt bit
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*/
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*/
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- writel(FEC_IEVENT_MII, &fec->eth->ievent);
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+ writel(FEC_IEVENT_MII, ð->ievent);
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debug("fec_miiphy_write: phy: %02x reg:%02x val:%#x\n", phyAddr,
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debug("fec_miiphy_write: phy: %02x reg:%02x val:%#x\n", phyAddr,
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regAddr, data);
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regAddr, data);
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