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@@ -98,15 +98,6 @@
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#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
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#define CFG_DSPIC_TEST_MASK 0x00000001
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-/* Additional registers for watchdog timer post test */
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-
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-#define CFG_DSPIC_TEST_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
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-#define CFG_WATCHDOG_TIME_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP4)
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-#define CFG_WATCHDOG_FLAGS_ADDR (CFG_PERIPHERAL_BASE + GPT0_COMP5)
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-#define CFG_WATCHDOG_MAGIC 0x12480000
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-#define CFG_WATCHDOG_MAGIC_MASK 0xFFFF0000
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-#define CFG_DSPIC_TEST_MASK 0x00000001
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-
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/*-----------------------------------------------------------------------
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* Serial Port
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*----------------------------------------------------------------------*/
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