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@@ -305,10 +305,10 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
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inbound = fsl_pci_setup_inbound_windows(hose, out_lo, pcie_cap, pi);
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for (r = 0; r < hose->region_count; r++)
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- debug("PCI reg:%d %016llx:%016llx %016llx %08x\n", r,
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+ debug("PCI reg:%d %016llx:%016llx %016llx %08lx\n", r,
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(u64)hose->regions[r].phys_start,
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- hose->regions[r].bus_start,
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- hose->regions[r].size,
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+ (u64)hose->regions[r].bus_start,
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+ (u64)hose->regions[r].size,
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hose->regions[r].flags);
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pci_register_hose(hose);
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@@ -344,7 +344,7 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info)
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setbits_be32(&pci->pdb_stat, 0x08000000);
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(void) in_be32(&pci->pdb_stat);
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udelay(100);
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- debug(" Asserting PCIe reset @%x = %x\n",
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+ debug(" Asserting PCIe reset @%p = %x\n",
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&pci->pdb_stat, in_be32(&pci->pdb_stat));
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/* clear PCIe reset */
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clrbits_be32(&pci->pdb_stat, 0x08000000);
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