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+/*
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+ * Copyright (C) 2010 Albert ARIBAUD <albert.aribaud@free.fr>
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+ *
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+ * Based on original Kirkwood support which is
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+ * (C) Copyright 2009
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+ * Marvell Semiconductor <www.marvell.com>
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+ * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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+ * MA 02110-1301 USA
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+ */
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+
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+#ifndef _CONFIG_EDMINIV2_H
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+#define _CONFIG_EDMINIV2_H
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+
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+/*
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+ * Version number information
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+ */
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+
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+#define CONFIG_IDENT_STRING " EDMiniV2"
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+
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+/*
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+ * High Level Configuration Options (easy to change)
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+ */
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+
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+#define CONFIG_MARVELL 1
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+#define CONFIG_ARM926EJS 1 /* Basic Architecture */
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+#define CONFIG_FEROCEON 1 /* CPU Core subversion */
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+#define CONFIG_ORION5X 1 /* SOC Family Name */
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+#define CONFIG_88F5182 1 /* SOC Name */
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+#define CONFIG_MACH_EDMINIV2 1 /* Machine type */
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+
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+/*
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+ * CLKs configurations
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+ */
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+
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+#define CONFIG_SYS_HZ 1000
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+
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+/*
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+ * Board-specific values for Orion5x MPP low level init:
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+ * - MPPs 12 to 15 are SATA LEDs (mode 5)
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+ * - Others are GPIO/unused (mode 3 for MPP0, mode 5 for
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+ * MPP16 to MPP19, mode 0 for others
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+ */
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+
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+#define ORION5X_MPP0_7 0x00000003
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+#define ORION5X_MPP8_15 0x55550000
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+#define ORION5X_MPP16_23 0x00000000
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+
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+/*
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+ * Board-specific values for Orion5x GPIO low level init:
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+ * - GPIO3 is input (RTC interrupt)
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+ * - GPIO16 is Power LED control (0 = on, 1 = off)
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+ * - GPIO17 is Power LED source select (0 = CPLD, 1 = GPIO16)
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+ * - GPIO18 is Power Button status (0 = Released, 1 = Pressed)
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+ * - Last GPIO is 26, further bits are supposed to be 0.
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+ * Enable mask has ones for INPUT, 0 for OUTPUT.
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+ * Default is LED ON.
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+ */
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+
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+#define ORION5X_GPIO_OUT_ENABLE 0x03fcffff
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+#define ORION5X_GPIO_OUT_VALUE 0x03fcffff
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+
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+/*
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+ * NS16550 Configuration
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+ */
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+
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+#define CONFIG_SYS_NS16550
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+#define CONFIG_SYS_NS16550_SERIAL
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+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
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+#define CONFIG_SYS_NS16550_COM1 ORION5X_UART0_BASE
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+
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+/*
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+ * Serial Port configuration
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+ * The following definitions let you select what serial you want to use
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+ * for your console driver.
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+ */
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+
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+#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
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+#define CONFIG_BAUDRATE 115200
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+#define CONFIG_SYS_BAUDRATE_TABLE \
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+ { 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 }
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+
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+/*
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+ * FLASH configuration
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+ */
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+
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+#define CONFIG_SYS_FLASH_CFI
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+#define CONFIG_FLASH_CFI_DRIVER
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+#define CONFIG_FLASH_CFI_LEGACY
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+#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
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+#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max num of sects on one chip */
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+#define CONFIG_SYS_FLASH_BASE 0xfff80000
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+#define CONFIG_SYS_FLASH_SECTSZ \
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+ {16384, 8192, 8192, 32768, \
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+ 65536, 65536, 65536, 65536, 65536, 65536, 65536}
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+
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+/* auto boot */
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+#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
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+
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+/*
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+ * For booting Linux, the board info and command line data
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+ * have to be in the first 8 MB of memory, since this is
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+ * the maximum mapped by the Linux kernel during initialization.
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+ */
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+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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+#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
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+#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
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+
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+#define CONFIG_SYS_PROMPT "EDMiniV2> " /* Command Prompt */
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+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
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+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
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+ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
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+/*
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+ * Commands configuration - using default command set for now
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+ */
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+#include <config_cmd_default.h>
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+/*
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+ * Disabling some default commands for staggered bring-up
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+ */
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+#undef CONFIG_CMD_BOOTD /* no bootd since no net */
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+#undef CONFIG_CMD_NET /* no net since no eth */
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+#undef CONFIG_CMD_NFS /* no NFS since no net */
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+
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+/*
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+ * Environment variables configurations
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+ */
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+#define CONFIG_ENV_IS_IN_FLASH 1
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+#define CONFIG_ENV_SECT_SIZE 0x2000 /* 16K */
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+#define CONFIG_ENV_SIZE 0x2000
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+#define CONFIG_ENV_OFFSET 0x4000 /* env starts here */
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+
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+/*
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+ * Size of malloc() pool
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+ */
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+#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */
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+/* size in bytes reserved for initial data */
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+#define CONFIG_SYS_GBL_DATA_SIZE 128
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+
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+/*
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+ * Other required minimal configurations
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+ */
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+#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
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+#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
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+#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
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+#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
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+#define CONFIG_NR_DRAM_BANKS 1
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+
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+#define CONFIG_STACKSIZE 0x00100000
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+#define CONFIG_SYS_LOAD_ADDR 0x00800000
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+#define CONFIG_SYS_MEMTEST_START 0x00400000
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+#define CONFIG_SYS_MEMTEST_END 0x007fffff
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+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000
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+#define CONFIG_SYS_MAXARGS 16
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+
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+#endif /* _CONFIG_EDMINIV2_H */
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