Fix build errors and warnings / code cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>

MAKEALL

@@ -133,8 +133,9 @@ LIST_8260="	\
 #########################################################################
 
 LIST_83xx="	\
-	MPC8313ERDB	MPC832XEMDS	MPC8349EMDS	MPC8349ITX	\
-	MPC8349ITXGP	MPC8360EMDS	sbc8349		TQM834x		\
+	MPC8313ERDB_33	MPC8313ERDB_66	MPC832XEMDS	MPC8349EMDS	\
+	MPC8349ITX	MPC8349ITXGP	MPC8360EMDS	sbc8349		\
+	TQM834x								\
 "
 
 

Makefile

@@ -1646,14 +1646,15 @@ r5200_config :		unconfig
 
 MPC8313ERDB_33_config \
 MPC8313ERDB_66_config: unconfig
-	@echo "" >include/config.h ; \
+	@mkdir -p $(obj)include
+	@echo "" >$(obj)include/config.h ; \
 	if [ "$(findstring _33_,$@)" ] ; then \
-		echo -n "...33M ..." ; \
-		echo "#define CFG_33MHZ" >>include/config.h ; \
+		echo "...33M ..." ; \
+		echo "#define CFG_33MHZ" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _66_,$@)" ] ; then \
-		echo -n "...66M..." ; \
-		echo "#define CFG_66MHZ" >>include/config.h ; \
+		echo "...66M..." ; \
+		echo "#define CFG_66MHZ" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC8313ERDB ppc mpc83xx mpc8313erdb
 
@@ -1661,23 +1662,24 @@ MPC832XEMDS_config \
 MPC832XEMDS_HOST_33_config \
 MPC832XEMDS_HOST_66_config \
 MPC832XEMDS_SLAVE_config:	unconfig
-	@echo "" >include/config.h ; \
+	@mkdir -p $(obj)include
+	@echo "" >$(obj)include/config.h ; \
 	if [ "$(findstring _HOST_,$@)" ] ; then \
-		echo -n "... PCI HOST " ; \
-		echo "#define CONFIG_PCI" >>include/config.h ; \
+		echo "... PCI HOST " ; \
+		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _SLAVE_,$@)" ] ; then \
 		echo "...PCI SLAVE 66M"  ; \
-		echo "#define CONFIG_PCI" >>include/config.h ; \
-		echo "#define CONFIG_PCISLAVE" >>include/config.h ; \
+		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
+		echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _33_,$@)" ] ; then \
-		echo -n "...33M ..." ; \
-		echo "#define PCI_33M" >>include/config.h ; \
+		echo "...33M ..." ; \
+		echo "#define PCI_33M" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _66_,$@)" ] ; then \
-		echo -n "...66M..." ; \
-		echo "#define PCI_66M" >>include/config.h ; \
+		echo "...66M..." ; \
+		echo "#define PCI_66M" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds
 
@@ -1702,23 +1704,24 @@ MPC8360EMDS_config \
 MPC8360EMDS_HOST_33_config \
 MPC8360EMDS_HOST_66_config \
 MPC8360EMDS_SLAVE_config:	unconfig
-	@echo "" >include/config.h ; \
+	@mkdir -p $(obj)include
+	@echo "" >$(obj)include/config.h ; \
 	if [ "$(findstring _HOST_,$@)" ] ; then \
-		echo -n "... PCI HOST " ; \
-		echo "#define CONFIG_PCI" >>include/config.h ; \
+		echo "... PCI HOST " ; \
+		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _SLAVE_,$@)" ] ; then \
 		echo "...PCI SLAVE 66M"  ; \
-		echo "#define CONFIG_PCI" >>include/config.h ; \
-		echo "#define CONFIG_PCISLAVE" >>include/config.h ; \
+		echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
+		echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _33_,$@)" ] ; then \
-		echo -n "...33M ..." ; \
-		echo "#define PCI_33M" >>include/config.h ; \
+		echo "...33M ..." ; \
+		echo "#define PCI_33M" >>$(obj)include/config.h ; \
 	fi ; \
 	if [ "$(findstring _66_,$@)" ] ; then \
-		echo -n "...66M..." ; \
-		echo "#define PCI_66M" >>include/config.h ; \
+		echo "...66M..." ; \
+		echo "#define PCI_66M" >>$(obj)include/config.h ; \
 	fi ;
 	@$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds
 
@@ -1744,10 +1747,10 @@ MPC8540EVAL_66_slave_config:      unconfig
 	@mkdir -p $(obj)include
 	@echo "" >$(obj)include/config.h ; \
 	if [ "$(findstring _33_,$@)" ] ; then \
-		echo -n "... 33 MHz PCI" ; \
+		echo "... 33 MHz PCI" ; \
 	else \
 		echo "#define CONFIG_SYSCLK_66M" >>$(obj)include/config.h ; \
-		echo -n "... 66 MHz PCI" ; \
+		echo "... 66 MHz PCI" ; \
 	fi ; \
 	if [ "$(findstring _slave_,$@)" ] ; then \
 		echo "#define CONFIG_PCI_SLAVE" >>$(obj)include/config.h ; \
@@ -2008,13 +2011,13 @@ omap1610h2_cs3boot_config \
 omap1610h2_cs_autoboot_config:	unconfig
 	@mkdir -p $(obj)include
 	@if [ "$(findstring _cs0boot_, $@)" ] ; then \
-		echo "#define CONFIG_CS0_BOOT" >> .$(obj)/include/config.h ; \
+		echo "#define CONFIG_CS0_BOOT" >> .$(obj)include/config.h ; \
 		echo "... configured for CS0 boot"; \
 	elif [ "$(findstring _cs_autoboot_, $@)" ] ; then \
-		echo "#define CONFIG_CS_AUTOBOOT" >> $(obj)./include/config.h ; \
+		echo "#define CONFIG_CS_AUTOBOOT" >> $(obj)include/config.h ; \
 		echo "... configured for CS_AUTO boot"; \
 	else \
-		echo "#define CONFIG_CS3_BOOT" >> $(obj)./include/config.h ; \
+		echo "#define CONFIG_CS3_BOOT" >> $(obj)include/config.h ; \
 		echo "... configured for CS3 boot"; \
 	fi;
 	@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
@@ -2183,11 +2186,12 @@ logodl_config	:	unconfig
 
 pdnb3_config \
 scpu_config:    unconfig
+	@mkdir -p $(obj)include
 	@if [ "$(findstring scpu_,$@)" ] ; then \
-		echo "#define CONFIG_SCPU"      >>include/config.h ; \
+		echo "#define CONFIG_SCPU"      >>$(obj)include/config.h ; \
 		echo "... on SCPU board variant" ; \
 	else \
-		>include/config.h ; \
+		>$(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a pdnb3 arm ixp pdnb3 prodrive
 
@@ -2409,13 +2413,15 @@ suzaku_config:	unconfig
 	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
 
 ml401_config:	unconfig
-	@ >include/config.h
-	@echo "#define CONFIG_ML401 1" >> include/config.h
+	@mkdir -p $(obj)include
+	@ >$(obj)include/config.h
+	@echo "#define CONFIG_ML401 1" >> $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
 
 xupv2p_config:	unconfig
-	@ >include/config.h
-	@echo "#define CONFIG_XUPV2P 1" >> include/config.h
+	@mkdir -p $(obj)include
+	@ >$(obj)include/config.h
+	@echo "#define CONFIG_XUPV2P 1" >> $(obj)include/config.h
 	@$(MKCONFIG) -a $(@:_config=) microblaze microblaze xupv2p xilinx
 
 #########################################################################

board/esd/cpci750/sdram_init.c

@@ -1252,7 +1252,7 @@ static int check_dimm (uchar slot, AUX_MEM_DIMM_INFO * dimmInfo)
 /* sets up the GT properly with information passed in */
 int setup_sdram (AUX_MEM_DIMM_INFO * info)
 {
-	ulong tmp, check;
+	ulong tmp;
 	ulong tmp_sdram_mode = 0;	/* 0x141c */
 	ulong tmp_dunit_control_low = 0;	/* 0x1404 */
 	int i;

board/freescale/common/pixis.c

@@ -321,10 +321,10 @@ static ulong strfractoint(uchar *strptr)
 		mulconst = 1;
 		for (i = 0; i < decarr_len; i++)
 			mulconst *= 10;
-		decval = simple_strtoul(decarr, NULL, 10);
+		decval = simple_strtoul((char *)decarr, NULL, 10);
 	}
 
-	intval = simple_strtoul(intarr, NULL, 10);
+	intval = simple_strtoul((char *)intarr, NULL, 10);
 	intval = intval * mulconst;
 
 	retval = intval + decval;
@@ -362,7 +362,7 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 		val = set_px_sysclk(simple_strtoul(argv[2], NULL, 10));
 
-		corepll = strfractoint(argv[3]);
+		corepll = strfractoint((uchar *)argv[3]);
 		val = val + set_px_corepll(corepll);
 		val = val + set_px_mpxpll(simple_strtoul(argv[4], NULL, 10));
 		if (val == 3) {
@@ -410,7 +410,7 @@ pixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			read_from_px_regs(0);
 			read_from_px_regs_altbank(0);
 			val = set_px_sysclk(simple_strtoul(argv[3], NULL, 10));
-			corepll = strfractoint(argv[4]);
+			corepll = strfractoint((uchar *)argv[4]);
 			val = val + set_px_corepll(corepll);
 			val = val + set_px_mpxpll(simple_strtoul(argv[5],
 								 NULL, 10));

board/mpc8641hpcn/mpc8641hpcn.c

@@ -63,9 +63,10 @@ int checkboard(void)
 
 	uint devdisr = gur->devdisr;
 	uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16;
+#ifdef DEBUG
 	uint host1_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 17;
 	uint pex1_agent = (host1_agent == 0) || (host1_agent == 1);
-
+#endif
 	if ((io_sel == 2 || io_sel == 3 || io_sel == 5
 	     || io_sel == 6 || io_sel == 7 || io_sel == 0xF)
 	    && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {

board/mpc8641hpcn/sys_eeprom.c

@@ -68,7 +68,7 @@ int mac_show(void)
 	       mac_data.date[5],
 	       mac_data.date[6]);
 	for (i = 0; i < 8; i++) {
-		sprintf(ethaddr[i],
+		sprintf((char *)ethaddr[i],
 			"%02x:%02x:%02x:%02x:%02x:%02x",
 			mac_data.mac[i][0],
 			mac_data.mac[i][1],
@@ -79,10 +79,10 @@ int mac_show(void)
 		printf("MAC %d %s\n", i, ethaddr[i]);
 	}
 
-	setenv("ethaddr", ethaddr[0]);
-	setenv("eth1addr", ethaddr[1]);
-	setenv("eth2addr", ethaddr[2]);
-	setenv("eth3addr", ethaddr[3]);
+	setenv("ethaddr",  (char *)ethaddr[0]);
+	setenv("eth1addr", (char *)ethaddr[1]);
+	setenv("eth2addr", (char *)ethaddr[2]);
+	setenv("eth3addr", (char *)ethaddr[3]);
 
 	return 0;
 }
@@ -236,7 +236,7 @@ int mac_read_from_eeprom(void)
 	} else {
 		for (i = 0; i < 4; i++) {
 			if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) {
-				sprintf(ethaddr[i],
+				sprintf((char *)ethaddr[i],
 					"%02x:%02x:%02x:%02x:%02x:%02x",
 					mac_data.mac[i][0],
 					mac_data.mac[i][1],
@@ -244,10 +244,10 @@ int mac_read_from_eeprom(void)
 					mac_data.mac[i][3],
 					mac_data.mac[i][4],
 					mac_data.mac[i][5]);
-				sprintf(enetvar,
+				sprintf((char *)enetvar,
 					i ? "eth%daddr" : "ethaddr",
 					i);
-				setenv(enetvar, ethaddr[i]);
+				setenv((char *)enetvar, (char *)ethaddr[i]);
 			}
 		}
 	}

board/spc1920/hpi.c

@@ -122,7 +122,9 @@ const uint dsp_table_fast[] =
 #define TINY_AUTOINC_BASE_ADDR 0x0
 
 static int hpi_activate(void);
+#if 0
 static void hpi_inactivate(void);
+#endif
 static void dsp_reset(void);
 
 static int hpi_write_inc(u32 addr, u32 *data, u32 count);
@@ -133,7 +135,9 @@ static u32 hpi_read_noinc(u32 addr);
 int hpi_test(void);
 static int hpi_write_addr_test(u32 addr);
 static int hpi_read_write_test(u32 addr, u32 data);
+#ifdef DO_TINY_TEST
 static int hpi_tiny_autoinc_test(void);
+#endif /* DO_TINY_TEST */
 #endif /* CONFIG_SPC1920_HPI_TEST */
 
 
@@ -185,6 +189,7 @@ static int hpi_activate(void)
 	return 0;
 }
 
+#if 0
 /* turn off the host port interface */
 static void hpi_inactivate(void)
 {
@@ -200,6 +205,7 @@ static void hpi_inactivate(void)
 	/* currently always on TBD */
 
 }
+#endif
 
 /* reset the DSP */
 static void dsp_reset(void)
@@ -570,6 +576,7 @@ static int hpi_read_write_test(u32 addr, u32 data)
 	return 0;
 }
 
+#ifdef DO_TINY_TEST
 static int hpi_tiny_autoinc_test(void)
 {
 	int i;
@@ -599,5 +606,6 @@ static int hpi_tiny_autoinc_test(void)
 	}
 	return 0;
 }
+#endif /* DO_TINY_TEST */
 
 #endif /* CONFIG_SPC1920_HPI_TEST */

cpu/mpc86xx/interrupts.c

@@ -71,7 +71,7 @@ static __inline__ void set_dec(unsigned long val)
 }
 
 /* interrupt is not supported yet */
-int interrupt_init_cpu(unsigned *decrementer_count)
+int interrupt_init_cpu(unsigned long *decrementer_count)
 {
 	return 0;
 }
@@ -107,7 +107,7 @@ int interrupt_init(void)
 		return ret;
 
 	decrementer_count = get_tbclk() / CFG_HZ;
-	debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n",
+	debug("interrupt init: tbclk() = %d MHz, decrementer_count = %ld\n",
 	      (get_tbclk() / 1000000),
 	      decrementer_count);
 
@@ -158,7 +158,7 @@ void timer_interrupt(struct pt_regs *regs)
 
 	timestamp++;
 
-	ppcDcbf(&timestamp);
+	ppcDcbf((unsigned long)&timestamp);
 
 	/* Restore Decrementer Count */
 	set_dec(decrementer_count);

include/configs/GEN860T.h

@@ -248,7 +248,7 @@
 #endif
 
 #ifdef CONFIG_POST
-u #define CONFIG_CMD_DIAG
+#define CONFIG_CMD_DIAG
 #endif
 
 /*

include/configs/LANTEC.h

@@ -106,6 +106,7 @@
 #undef CONFIG_CMD_IRQ
 #undef CONFIG_CMD_JFFS2
 #undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_MFSL
 #undef CONFIG_CMD_MII
 #undef CONFIG_CMD_MMC
 #undef CONFIG_CMD_NAND

include/configs/MPC8260ADS.h

@@ -227,6 +227,7 @@
 #undef CONFIG_CMD_HWFLOW
 #undef CONFIG_CMD_IDE
 #undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_MFSL
 #undef CONFIG_CMD_MMC
 #undef CONFIG_CMD_NAND
 #undef CONFIG_CMD_PCMCIA
@@ -405,9 +406,9 @@
 #define CFG_BCR			0x100C0000
 #define CFG_SIUMCR		0x0A200000
 #define CFG_SCCR		SCCR_DFBRG01
-#define CFG_BR0_PRELIM		CFG_FLASH_BASE | 0x00001801
+#define CFG_BR0_PRELIM		(CFG_FLASH_BASE | 0x00001801)
 #define CFG_OR0_PRELIM		0xFF800876
-#define CFG_BR1_PRELIM		CFG_BCSR | 0x00001801
+#define CFG_BR1_PRELIM		(CFG_BCSR | 0x00001801)
 #define CFG_OR1_PRELIM		0xFFFF8010
 
 /*We need to configure chip select to use CPLD PCI IC on MPC8272ADS*/

include/configs/MPC8266ADS.h

@@ -165,6 +165,7 @@
 #undef CONFIG_CMD_IDE
 #undef CONFIG_CMD_JFFS2
 #undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_MFSL
 #undef CONFIG_CMD_MMC
 #undef CONFIG_CMD_NAND
 #undef CONFIG_CMD_PCMCIA

include/configs/MPC8313ERDB.h

@@ -265,7 +265,7 @@
 #define CONFIG_I2C_CMD_TREE
 #define CFG_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CFG_I2C_SLAVE		0x7F
-#define CFG_I2C_NOPROBES	{0x69}	/* Don't probe these addrs */
+#define CFG_I2C_NOPROBES	{{0,0x69}} /* Don't probe these addrs */
 #define CFG_I2C_OFFSET		0x3000
 #define CFG_I2C2_OFFSET		0x3100
 

include/configs/RBC823.h

@@ -119,6 +119,7 @@
 #undef CONFIG_CMD_IRQ
 #undef CONFIG_CMD_JFFS2
 #undef CONFIG_CMD_MII
+#undef CONFIG_CMD_MFSL
 #undef CONFIG_CMD_MMC
 #undef CONFIG_CMD_NAND
 #undef CONFIG_CMD_PCI

include/configs/ep8260.h

@@ -321,6 +321,7 @@
 #undef CONFIG_CMD_JFFS2
 #undef CONFIG_CMD_KGDB
 #undef CONFIG_CMD_MII
+#undef CONFIG_CMD_MFSL
 #undef CONFIG_CMD_MMC
 #undef CONFIG_CMD_NAND
 #undef CONFIG_CMD_PCI

include/configs/gw8260.h

@@ -294,7 +294,7 @@
 #define CONFIG_BOOTP_BOOTPATH
 
 #define CONFIG_BOOTP_BOOTFILESIZE
-#definef CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS
 
 /* undef this to save memory */
 #define CFG_LONGHELP

include/configs/hymod.h

@@ -199,6 +199,7 @@
 #undef CONFIG_CMD_IDE
 #undef CONFIG_CMD_JFFS2
 #undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_MFSL
 #undef CONFIG_CMD_MMC
 #undef CONFIG_CMD_PCMCIA
 #undef CONFIG_CMD_PCI

include/configs/mpc7448hpc2.h

@@ -375,9 +375,9 @@
 /*-----------------------------------------------------------------------
  * FLASH organization
  */
-#define CFG_MAX_FLASH_BANKS	1/* Flash can be at one of two addresses */
+#define CFG_MAX_FLASH_BANKS	1		/* Flash can be at one of two addresses */
 #define FLASH_BANK_SIZE		0x01000000	/* 16 MB Total */
-#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE, CFG_FLASH_BASE2}
+#define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE, /* CFG_FLASH_BASE2 */ }
 
 #define CFG_FLASH_CFI_DRIVER
 #define CFG_FLASH_CFI

include/configs/ppmc7xx.h

@@ -25,29 +25,30 @@
 /*
  * Debug
  *
- * DEBUG			- Define this is you want extra debug info
- * GTREGREAD			- Required to build with debug
- * do_bdinfo			- Required to build with debug
+ * DEBUG		- Define this is you want extra debug info
+ * GTREGREAD		- Required to build with debug
+ * do_bdinfo		- Required to build with debug
  */
 
 #undef	DEBUG
-#define	GTREGREAD(x)			0xFFFFFFFF
+#ifdef	DEBUG
+#define	GTREGREAD(x)	0xFFFFFFFF
 #define	do_bdinfo(a,b,c,d)
-
+#endif
 
 /*
  * CPU type
  *
- * CONFIG_7xx			- We have a 750 or 755 CPU
- * CONFIG_74xx			- We have a 7400 CPU
- * CONFIG_ALTIVEC		- We have altivec enabled CPU (only 7400)
- * CONFIG_BUS_CLK		- System bus clock in Hz
+ * CONFIG_7xx		- We have a 750 or 755 CPU
+ * CONFIG_74xx		- We have a 7400 CPU
+ * CONFIG_ALTIVEC	- We have altivec enabled CPU (only 7400)
+ * CONFIG_BUS_CLK	- System bus clock in Hz
  */
 
 #define	CONFIG_7xx
 #undef	CONFIG_74xx
 #undef	CONFIG_ALTIVEC
-#define CONFIG_BUS_CLK			66000000
+#define CONFIG_BUS_CLK	66000000
 
 
 /*
@@ -97,18 +98,18 @@
  * Serial configuration
  *
  * CONFIG_CONS_INDEX		- Serial console port number (COM1)
- * CONFIG_BAUDRATE			- Serial speed
+ * CONFIG_BAUDRATE		- Serial speed
  */
 
-#define CONFIG_CONS_INDEX		1
-#define CONFIG_BAUDRATE			9600
+#define CONFIG_CONS_INDEX	1
+#define CONFIG_BAUDRATE		9600
 
 
 /*
  * PCI config
  *
- * CONFIG_PCI				- Enable PCI bus
- * CONFIG_PCI_PNP			- Enable Plug & Play support
+ * CONFIG_PCI			- Enable PCI bus
+ * CONFIG_PCI_PNP		- Enable Plug & Play support
  * CONFIG_PCI_SCAN_SHOW		- Enable display of devices at startup
  */
 
@@ -120,9 +121,9 @@
 /*
  * Network config
  *
- * CONFIG_NET_MULTI			- Support for multiple network interfaces
- * CONFIG_EEPRO100			- Intel 8255x Ethernet Controller
- * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM
+ * CONFIG_NET_MULTI		- Support for multiple network interfaces
+ * CONFIG_EEPRO100		- Intel 8255x Ethernet Controller
+ * CONFIG_EEPRO100_SROM_WRITE	- Enable writing to network card ROM
  */
 
 #define	CONFIG_NET_MULTI
@@ -145,7 +146,7 @@
  * Boot config
  *
  * CONFIG_BOOTCOMMAND		- Command(s) to execute to auto-boot
- * CONFIG_BOOTDELAY			- How long to wait before auto-boot (in sec)
+ * CONFIG_BOOTDELAY		- How long to wait before auto-boot (in sec)
  */
 
 #define CONFIG_BOOTCOMMAND		\
@@ -169,79 +170,79 @@
  *
  * This board runs in a standard CHRP (Map-B) configuration.
  *
- *	Type		Start		End			Size	Width	Chip Sel
+ *	Type	    Start	End	    Size    Width   Chip Sel
  *	----------- ----------- ----------- ------- ------- --------
- *	SDRAM		0x00000000	0x04000000	64MB	64b		SDRAMCS0
- *	User LED's	0x78000000						RCS3
- *	UART		0x7C000000						RCS2
- *	Mailbox		0xFF000000						RCS1
- *	Flash		0xFFC00000	0xFFFFFFFF	4MB	64b		RCS0
+ *	SDRAM	    0x00000000	0x04000000  64MB    64b	    SDRAMCS0
+ *	User LED's  0x78000000				    RCS3
+ *	UART	    0x7C000000				    RCS2
+ *	Mailbox	    0xFF000000				    RCS1
+ *	Flash	    0xFFC00000	0xFFFFFFFF   4MB    64b	    RCS0
  *
  * Flash sectors are laid out as follows.
  *
- *	Sector	Start		End			Size	Comments
+ *	Sector	Start		End	Size	Comments
  *	------- ----------- ----------- ------- -----------
- *	 0		0xFFC00000	0xFFC3FFFF	256KB
- *   1		0xFFC40000	0xFFC7FFFF	256KB
- *	 2		0xFFC80000	0xFFCBFFFF	256KB
- *	 3		0xFFCC0000	0xFFCFFFFF	256KB
- *	 4		0xFFD00000	0xFFD3FFFF	256KB
- *	 5		0xFFD40000	0xFFD7FFFF	256KB
- *	 6		0xFFD80000	0xFFDBFFFF	256KB
- *	 7		0xFFDC0000	0xFFDFFFFF	256KB
- *   8		0xFFE00000	0xFFE3FFFF	256KB
- *	 9		0xFFE40000	0xFFE7FFFF	256KB
- *  10		0xFFE80000	0xFFEBFFFF	256KB
- *  11		0xFFEC0000	0xFFEFFFFF	256KB
- *  12		0xFFF00000	0xFFF3FFFF	256KB	U-Boot code here
- *  13		0xFFF40000	0xFFF7FFFF	256KB
- *  14		0xFFF80000	0xFFFBFFFF	256KB
- *  15		0xFFFC0000	0xFFFDFFFF	128KB
- *  16		0xFFFE0000	0xFFFE7FFF	 32KB	U-Boot env vars here
- *  17		0xFFFE8000	0xFFFEFFFF	 32KB	U-Boot backup copy of env vars here
- *  18		0xFFFF0000	0xFFFFFFFF	 64KB
+ *	 0	0xFFC00000  0xFFC3FFFF	256KB
+ *	 1	0xFFC40000  0xFFC7FFFF	256KB
+ *	 2	0xFFC80000  0xFFCBFFFF	256KB
+ *	 3	0xFFCC0000  0xFFCFFFFF	256KB
+ *	 4	0xFFD00000  0xFFD3FFFF	256KB
+ *	 5	0xFFD40000  0xFFD7FFFF	256KB
+ *	 6	0xFFD80000  0xFFDBFFFF	256KB
+ *	 7	0xFFDC0000  0xFFDFFFFF	256KB
+ *	 8	0xFFE00000  0xFFE3FFFF	256KB
+ *	 9	0xFFE40000  0xFFE7FFFF	256KB
+ *	10	0xFFE80000  0xFFEBFFFF	256KB
+ *	11	0xFFEC0000  0xFFEFFFFF	256KB
+ *	12	0xFFF00000  0xFFF3FFFF	256KB	U-Boot code here
+ *	13	0xFFF40000  0xFFF7FFFF	256KB
+ *	14	0xFFF80000  0xFFFBFFFF	256KB
+ *	15	0xFFFC0000  0xFFFDFFFF	128KB
+ *	16	0xFFFE0000  0xFFFE7FFF	 32KB	U-Boot env vars here
+ *	17	0xFFFE8000  0xFFFEFFFF	 32KB	U-Boot backup copy of env vars here
+ *	18	0xFFFF0000  0xFFFFFFFF	 64KB
  */
 
 
 /*
  * SDRAM config - see memory map details above.
  *
- * CFG_SDRAM_BASE			- Start address of SDRAM, this _must_ be zero!
- * CFG_SDRAM_SIZE			- Total size of contiguous SDRAM bank(s)
+ * CFG_SDRAM_BASE		- Start address of SDRAM, this _must_ be zero!
+ * CFG_SDRAM_SIZE		- Total size of contiguous SDRAM bank(s)
  */
 
-#define CFG_SDRAM_BASE			0x00000000
-#define CFG_SDRAM_SIZE			0x04000000
+#define CFG_SDRAM_BASE		0x00000000
+#define CFG_SDRAM_SIZE		0x04000000
 
 
 /*
  * Flash config - see memory map details above.
  *
- * CFG_FLASH_BASE			- Start address of flash memory
- * CFG_FLASH_SIZE			- Total size of contiguous flash mem
+ * CFG_FLASH_BASE		- Start address of flash memory
+ * CFG_FLASH_SIZE		- Total size of contiguous flash mem
  * CFG_FLASH_ERASE_TOUT		- Erase timeout in ms
  * CFG_FLASH_WRITE_TOUT		- Write timeout in ms
  * CFG_MAX_FLASH_BANKS		- Number of banks of flash on board
  * CFG_MAX_FLASH_SECT		- Number of sectors in a bank
  */
 
-#define CFG_FLASH_BASE			0xFFC00000
-#define CFG_FLASH_SIZE			0x00400000
+#define CFG_FLASH_BASE		0xFFC00000
+#define CFG_FLASH_SIZE		0x00400000
 #define CFG_FLASH_ERASE_TOUT	250000
 #define CFG_FLASH_WRITE_TOUT	5000
-#define CFG_MAX_FLASH_BANKS		1
-#define CFG_MAX_FLASH_SECT		19
+#define CFG_MAX_FLASH_BANKS	1
+#define CFG_MAX_FLASH_SECT	19
 
 
 /*
  * Monitor config - see memory map details above
  *
- * CFG_MONITOR_BASE			- Base address of monitor code
- * CFG_MALLOC_LEN			- Size of malloc pool (128KB)
+ * CFG_MONITOR_BASE		- Base address of monitor code
+ * CFG_MALLOC_LEN		- Size of malloc pool (128KB)
  */
 
-#define CFG_MONITOR_BASE		TEXT_BASE
-#define CFG_MALLOC_LEN			0x20000
+#define CFG_MONITOR_BASE	TEXT_BASE
+#define CFG_MALLOC_LEN		0x20000
 
 
 /*
@@ -259,16 +260,16 @@
  * CFG_PROMPT			- Prompt string
  */
 
-#define CFG_BARGSIZE			1024
-#define CFG_BOOTMAPSZ			0x800000
-#define CFG_CBSIZE			1024
-#define CFG_LOAD_ADDR			0x100000
+#define CFG_BARGSIZE		1024
+#define CFG_BOOTMAPSZ		0x800000
+#define CFG_CBSIZE		1024
+#define CFG_LOAD_ADDR		0x100000
 #define CFG_LONGHELP
-#define CFG_MAXARGS			16
-#define CFG_MEMTEST_START		0x00040000
-#define CFG_MEMTEST_END			0x00040100
-#define CFG_PBSIZE			1024
-#define CFG_PROMPT			"=> "
+#define CFG_MAXARGS		16
+#define CFG_MEMTEST_START	0x00040000
+#define CFG_MEMTEST_END		0x00040100
+#define CFG_PBSIZE		1024
+#define CFG_PROMPT		"=> "
 
 
 /*
@@ -280,12 +281,12 @@
  * CFG_ENV_SECT_SIZE		- Size of sector containing env vars (32KB)
  */
 
-#define CFG_ENV_IS_IN_FLASH		1
-#define CFG_ENV_ADDR			0xFFFE0000
-#define CFG_ENV_SIZE			0x1000
-#define CFG_ENV_ADDR_REDUND		0xFFFE8000
-#define CFG_ENV_SIZE_REDUND		0x1000
-#define CFG_ENV_SECT_SIZE		0x8000
+#define CFG_ENV_IS_IN_FLASH	1
+#define CFG_ENV_ADDR		0xFFFE0000
+#define CFG_ENV_SIZE		0x1000
+#define CFG_ENV_ADDR_REDUND	0xFFFE8000
+#define CFG_ENV_SIZE_REDUND	0x1000
+#define CFG_ENV_SECT_SIZE	0x8000
 
 
 /*
@@ -296,15 +297,15 @@
  * copied to top of RAM by the init code.
  *
  * CFG_INIT_RAM_ADDR		- Address of Init RAM, above exception vect
- * CFG_INIT_RAM_END			- Size of Init RAM
+ * CFG_INIT_RAM_END		- Size of Init RAM
  * CFG_GBL_DATA_SIZE		- Ammount of RAM to reserve for global data
  * CFG_GBL_DATA_OFFSET		- Start of global data, top of stack
  */
 
-#define CFG_INIT_RAM_ADDR		(CFG_SDRAM_BASE + 0x4000)
-#define CFG_INIT_RAM_END		0x4000
-#define CFG_GBL_DATA_SIZE		128
-#define CFG_GBL_DATA_OFFSET		(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_RAM_ADDR	(CFG_SDRAM_BASE + 0x4000)
+#define CFG_INIT_RAM_END	0x4000
+#define CFG_GBL_DATA_SIZE	128
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 
 
 /*
@@ -341,71 +342,71 @@
  * Cache config
  *
  * CFG_CACHELINE_SIZE		- Size of a cache line (CPU specific)
- * CFG_L2					- L2 cache enabled if defined
- * L2_INIT					- L2 cache init flags
- * L2_ENABLE				- L2 cache enable flags
+ * CFG_L2			- L2 cache enabled if defined
+ * L2_INIT			- L2 cache init flags
+ * L2_ENABLE			- L2 cache enable flags
  */
 
-#define CFG_CACHELINE_SIZE		32
+#define CFG_CACHELINE_SIZE	32
 #undef	CFG_L2
-#define L2_INIT					0
-#define L2_ENABLE				0
+#define L2_INIT			0
+#define L2_ENABLE		0
 
 
 /*
  * Clocks config
  *
- * CFG_BUS_HZ				- Bus clock frequency in Hz
- * CFG_BUS_CLK				- As above (?)
- * CFG_HZ					- Decrementer freq in Hz
+ * CFG_BUS_HZ			- Bus clock frequency in Hz
+ * CFG_BUS_CLK			- As above (?)
+ * CFG_HZ			- Decrementer freq in Hz
  */
 
-#define CFG_BUS_HZ				CONFIG_BUS_CLK
-#define CFG_BUS_CLK				CONFIG_BUS_CLK
-#define CFG_HZ					1000
+#define CFG_BUS_HZ		CONFIG_BUS_CLK
+#define CFG_BUS_CLK		CONFIG_BUS_CLK
+#define CFG_HZ			1000
 
 
 /*
  * Serial port config
  *
  * CFG_BAUDRATE_TABLE		- List of valid baud rates
- * CFG_NS16550				- Include the NS16550 driver
+ * CFG_NS16550			- Include the NS16550 driver
  * CFG_NS16550_SERIAL		- Include the serial (wrapper) driver
- * CFG_NS16550_CLK			- Frequency of reference clock
+ * CFG_NS16550_CLK		- Frequency of reference clock
  * CFG_NS16550_REG_SIZE		- 64-bit accesses to 8-bit port
- * CFG_NS16550_COM1			- Base address of 1st serial port
+ * CFG_NS16550_COM1		- Base address of 1st serial port
  */
 
-#define CFG_BAUDRATE_TABLE		{ 9600, 19200, 38400, 57600, 115200 }
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 #define CFG_NS16550
 #define CFG_NS16550_SERIAL
-#define CFG_NS16550_CLK			3686400
+#define CFG_NS16550_CLK		3686400
 #define CFG_NS16550_REG_SIZE	-8
-#define CFG_NS16550_COM1		0x7C000000
+#define CFG_NS16550_COM1	0x7C000000
 
 
 /*
  * PCI Config - Address Map B (CHRP)
  */
 
-#define CFG_PCI_MEMORY_BUS      0x00000000
-#define CFG_PCI_MEMORY_PHYS     0x00000000
-#define CFG_PCI_MEMORY_SIZE     0x40000000
-#define CFG_PCI_MEM_BUS         0x80000000
-#define CFG_PCI_MEM_PHYS        0x80000000
-#define CFG_PCI_MEM_SIZE        0x7D000000
-#define CFG_ISA_MEM_BUS         0x00000000
-#define CFG_ISA_MEM_PHYS        0xFD000000
-#define CFG_ISA_MEM_SIZE        0x01000000
-#define CFG_PCI_IO_BUS          0x00800000
-#define CFG_PCI_IO_PHYS         0xFE800000
-#define CFG_PCI_IO_SIZE         0x00400000
-#define CFG_ISA_IO_BUS          0x00000000
-#define CFG_ISA_IO_PHYS         0xFE000000
-#define CFG_ISA_IO_SIZE         0x00800000
+#define CFG_PCI_MEMORY_BUS	0x00000000
+#define CFG_PCI_MEMORY_PHYS	0x00000000
+#define CFG_PCI_MEMORY_SIZE	0x40000000
+#define CFG_PCI_MEM_BUS		0x80000000
+#define CFG_PCI_MEM_PHYS	0x80000000
+#define CFG_PCI_MEM_SIZE	0x7D000000
+#define CFG_ISA_MEM_BUS		0x00000000
+#define CFG_ISA_MEM_PHYS	0xFD000000
+#define CFG_ISA_MEM_SIZE	0x01000000
+#define CFG_PCI_IO_BUS		0x00800000
+#define CFG_PCI_IO_PHYS		0xFE800000
+#define CFG_PCI_IO_SIZE		0x00400000
+#define CFG_ISA_IO_BUS		0x00000000
+#define CFG_ISA_IO_PHYS		0xFE000000
+#define CFG_ISA_IO_SIZE		0x00800000
 #define CFG_ISA_IO_BASE_ADDRESS CFG_ISA_IO_PHYS
-#define CFG_ISA_IO              CFG_ISA_IO_PHYS
-#define CFG_60X_PCI_IO_OFFSET   CFG_ISA_IO_PHYS
+#define CFG_ISA_IO		CFG_ISA_IO_PHYS
+#define CFG_60X_PCI_IO_OFFSET	CFG_ISA_IO_PHYS
 
 
 /*
@@ -420,12 +421,12 @@
 /*
  * Boot flags
  *
- * BOOTFLAG_COLD			- Indicates a power-on boot
- * BOOTFLAG_WARM			- Indicates a software reset
+ * BOOTFLAG_COLD		- Indicates a power-on boot
+ * BOOTFLAG_WARM		- Indicates a software reset
  */
 
-#define BOOTFLAG_COLD			0x01
-#define BOOTFLAG_WARM			0x02
+#define BOOTFLAG_COLD		0x01
+#define BOOTFLAG_WARM		0x02
 
 
 #endif /* __CONFIG_H */

include/configs/sbc8349.h

@@ -328,7 +328,7 @@
 #define CONFIG_I2C_CMD_TREE
 #define CFG_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CFG_I2C_SLAVE		0x7F
-#define CFG_I2C_NOPROBES	{{0,0x69}}	/* Don't probe these addrs */
+#define CFG_I2C_NOPROBES	{0x69}	/* Don't probe these addrs */
 #define CFG_I2C1_OFFSET		0x3000
 #define CFG_I2C2_OFFSET		0x3100
 #define CFG_I2C_OFFSET		CFG_I2C2_OFFSET