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@@ -29,6 +29,7 @@
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#include "uccf.h"
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#include "uec.h"
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#include "uec_phy.h"
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+#include "miiphy.h"
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#if defined(CONFIG_QE)
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@@ -125,6 +126,13 @@ static uec_info_t eth4_uec_info = {
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};
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#endif
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+#define MAXCONTROLLERS (4)
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+
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+static struct eth_device *devlist[MAXCONTROLLERS];
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+
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+u16 phy_read (struct uec_mii_info *mii_info, u16 regnum);
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+void phy_write (struct uec_mii_info *mii_info, u16 regnum, u16 val);
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+
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static int uec_mac_enable(uec_private_t *uec, comm_dir_e mode)
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{
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uec_t *uec_regs;
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@@ -629,6 +637,39 @@ static void phy_change(struct eth_device *dev)
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adjust_link(dev);
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}
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+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
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+ && !defined(BITBANGMII)
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+
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+/*
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+ * Read a MII PHY register.
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+ *
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+ * Returns:
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+ * 0 on success
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+ */
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+static int uec_miiphy_read(char *devname, unsigned char addr,
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+ unsigned char reg, unsigned short *value)
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+{
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+ *value = uec_read_phy_reg(devlist[0], addr, reg);
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+
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+ return 0;
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+}
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+
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+/*
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+ * Write a MII PHY register.
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+ *
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+ * Returns:
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+ * 0 on success
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+ */
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+static int uec_miiphy_write(char *devname, unsigned char addr,
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+ unsigned char reg, unsigned short value)
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+{
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+ uec_write_phy_reg(devlist[0], addr, reg, value);
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+
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+ return 0;
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+}
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+
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+#endif
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+
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static int uec_set_mac_address(uec_private_t *uec, u8 *mac_addr)
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{
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uec_t *uec_regs;
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@@ -1334,6 +1375,8 @@ int uec_initialize(int index)
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return -EINVAL;
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}
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+ devlist[index] = dev;
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+
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uec->uec_info = uec_info;
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sprintf(dev->name, "FSL UEC%d", index);
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@@ -1356,6 +1399,13 @@ int uec_initialize(int index)
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return err;
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}
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+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
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+ && !defined(BITBANGMII)
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+ miiphy_register(dev->name, uec_miiphy_read, uec_miiphy_write);
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+#endif
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+
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return 1;
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}
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+
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+
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#endif /* CONFIG_QE */
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