omap4: Use a smaller M,N couple for IVA DPLL

This reduced M,N couple corresponds to the advised value from
TI HW team.

Tested on 4460 Pandaboard, it also provides peripheral clocks
closer to the advised values.

Signed-off-by: Sebastien Jan <s-jan@ti.com>

arch/arm/cpu/armv7/omap4/clocks.c

@@ -146,7 +146,7 @@ static const struct dpll_params iva_dpll_params_1862mhz[NUM_SYS_CLKS] = {
 	{727, 14, -1, -1, 4, 7, -1, -1},	/* 19.2 MHz */
 	{931, 25, -1, -1, 4, 7, -1, -1},	/* 26 MHz   */
 	{931, 26, -1, -1, 4, 7, -1, -1},	/* 27 MHz   */
-	{412, 16, -1, -1, 4, 7, -1, -1}		/* 38.4 MHz */
+	{291, 11, -1, -1, 4, 7, -1, -1}		/* 38.4 MHz */
 };
 
 /* ABE M & N values with sys_clk as source */