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@@ -1,6 +1,7 @@
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/*
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* Miscelaneous DaVinci functions.
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*
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+ * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
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* Copyright (C) 2004 Texas Instruments.
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@@ -27,7 +28,8 @@
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#include <i2c.h>
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#include <net.h>
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#include <asm/arch/hardware.h>
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-
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+#include <asm/io.h>
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+#include "misc.h"
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DECLARE_GLOBAL_DATA_PTR;
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@@ -109,3 +111,47 @@ void dv_configure_mac_address(uint8_t *rom_enetaddr)
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}
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#endif /* DAVINCI_EMAC */
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+
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+/*
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+ * Change the setting of a pin multiplexer field.
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+ *
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+ * Takes an array of pinmux settings similar to:
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+ *
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+ * struct pinmux_config uart_pins[] = {
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+ * { &davinci_syscfg_regs->pinmux[8], 2, 7 },
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+ * { &davinci_syscfg_regs->pinmux[9], 2, 0 }
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+ * };
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+ *
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+ * Stepping through the array, each pinmux[n] register has the given value
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+ * set in the pin mux field specified.
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+ *
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+ * The number of pins in the array must be passed (ARRAY_SIZE can provide
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+ * this value conveniently).
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+ *
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+ * Returns 0 if all field numbers and values are in the correct range,
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+ * else returns -1.
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+ */
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+int davinci_configure_pin_mux(const struct pinmux_config *pins,
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+ const int n_pins)
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+{
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+ int i;
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+
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+ /* check for invalid pinmux values */
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+ for (i = 0; i < n_pins; i++) {
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+ if (pins[i].field >= PIN_MUX_NUM_FIELDS ||
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+ (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0)
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+ return -1;
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+ }
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+
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+ /* configure the pinmuxes */
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+ for (i = 0; i < n_pins; i++) {
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+ const int offset = pins[i].field * PIN_MUX_FIELD_SIZE;
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+ const unsigned int value = pins[i].value << offset;
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+ const unsigned int mask = PIN_MUX_FIELD_MASK << offset;
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+ const dv_reg *mux = pins[i].mux;
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+
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+ writel(value | (readl(mux) & (~mask)), mux);
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+ }
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+
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+ return 0;
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+}
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