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@@ -289,45 +289,6 @@ int pci_pre_init(struct pci_controller * hose )
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}
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#endif /* defined(CONFIG_PCI) */
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-/*************************************************************************
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- * pci_target_init
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- *
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- * The bootstrap configuration provides default settings for the pci
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- * inbound map (PIM). But the bootstrap config choices are limited and
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- * may not be sufficient for a given board.
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- *
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- ************************************************************************/
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-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
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-void pci_target_init(struct pci_controller * hose )
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-{
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- /*-------------------------------------------------------------------+
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- * Disable everything
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- *-------------------------------------------------------------------*/
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- out32r( PCIX0_PIM0SA, 0 ); /* disable */
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- out32r( PCIX0_PIM1SA, 0 ); /* disable */
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- out32r( PCIX0_PIM2SA, 0 ); /* disable */
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- out32r( PCIX0_EROMBA, 0 ); /* disable expansion rom */
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-
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- /*-------------------------------------------------------------------+
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- * Map all of SDRAM to PCI address 0x0000_0000. Note that the 440
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- * strapping options to not support sizes such as 128/256 MB.
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- *-------------------------------------------------------------------*/
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- out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE );
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- out32r( PCIX0_PIM0LAH, 0 );
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- out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
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-
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- out32r( PCIX0_BAR0, 0 );
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-
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- /*-------------------------------------------------------------------+
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- * Program the board's subsystem id/vendor id
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- *-------------------------------------------------------------------*/
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- out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID );
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- out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID );
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-
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- out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
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-}
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-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
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-
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#ifdef CONFIG_PCI
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static struct pci_controller pcie_hose[2] = {{0},{0}};
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