Quellcode durchsuchen

Merge branch 'master' of /home/wd/git/u-boot/custodians

Wolfgang Denk vor 17 Jahren
Ursprung
Commit
c90d115913

+ 1 - 1
MAKEALL

@@ -691,7 +691,7 @@ LIST_coldfire="			\
 	M52277EVB		\
 	M5235EVB		\
 	M5249EVB		\
-	M5253EVB		\
+	M5253EVBE		\
 	M5271EVB		\
 	M5272C3			\
 	M5275EVB		\

+ 1 - 1
board/BuS/EB+MCF-EV123/mii.c

@@ -201,7 +201,7 @@ int mii_discover_phy(struct eth_device *dev)
 }
 #endif				/* CFG_DISCOVER_PHY */
 
-int mii_init(void) __attribute__((weak,alias("__mii_init")));
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
 
 void __mii_init(void)
 {

+ 1 - 1
board/cobra5272/mii.c

@@ -200,7 +200,7 @@ int mii_discover_phy(struct eth_device *dev)
 }
 #endif				/* CFG_DISCOVER_PHY */
 
-int mii_init(void) __attribute__((weak,alias("__mii_init")));
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
 
 void __mii_init(void)
 {

+ 3 - 0
board/freescale/m5235evb/m5235evb.c

@@ -75,9 +75,11 @@ phys_size_t initdram(int board_type)
 		sdram->dacr0 =
 		    SDRAMC_DARCn_BA(CFG_SDRAM_BASE) | SDRAMC_DARCn_CASL_C1 |
 		    SDRAMC_DARCn_CBM_CMD20 | SDRAMC_DARCn_PS_32;
+		asm("nop");
 
 		/* Initialize DMR0 */
 		sdram->dmr0 = ((dramsize - 1) & 0xFFFC0000) | SDRAMC_DMRn_V;
+		asm("nop");
 
 		/* Set IP (bit 3) in DACR */
 		sdram->dacr0 |= SDRAMC_DARCn_IP;
@@ -100,6 +102,7 @@ phys_size_t initdram(int board_type)
 
 		/* Finish the configuration by issuing the MRS. */
 		sdram->dacr0 |= SDRAMC_DARCn_IMRS;
+		asm("nop");
 
 		/* Write to the SDRAM Mode Register */
 		*(u32 *) (CFG_SDRAM_BASE + 0x400) = 0xA5A59696;

+ 1 - 1
cpu/mcf5227x/cpu_init.c

@@ -106,7 +106,7 @@ void cpu_init_f(void)
  */
 int cpu_init_r(void)
 {
-#ifdef CONFIG_MCFTMR
+#ifdef CONFIG_MCFRTC
 	volatile rtc_t *rtc = (volatile rtc_t *)(CFG_MCFRTC_BASE);
 	volatile rtcex_t *rtcex = (volatile rtcex_t *)&rtc->extended;
 	u32 oscillator = CFG_RTC_OSCILLATOR;

+ 4 - 8
cpu/mcf52x2/cpu_init.c

@@ -419,8 +419,7 @@ void cpu_init_f(void)
 	   else is doing it! */
 
 #if defined(CFG_CS0_BASE) & defined(CFG_CS0_SIZE) & \
-    defined(CFG_CS0_WIDTH) & defined(CFG_CS0_RO) & \
-	defined(CFG_CS0_WS)
+    defined(CFG_CS0_WIDTH) & defined(CFG_CS0_WS)
 
 	MCFCSM_CSAR0 = (CFG_CS0_BASE >> 16) & 0xFFFF;
 
@@ -447,8 +446,7 @@ void cpu_init_f(void)
 #endif
 
 #if defined(CFG_CS1_BASE) & defined(CFG_CS1_SIZE) & \
-    defined(CFG_CS1_WIDTH) & defined(CFG_CS1_RO) & \
-	defined(CFG_CS1_WS)
+    defined(CFG_CS1_WIDTH) & defined(CFG_CS1_WS)
 
 	MCFCSM_CSAR1 = (CFG_CS1_BASE >> 16) & 0xFFFF;
 
@@ -476,8 +474,7 @@ void cpu_init_f(void)
 #endif
 
 #if defined(CFG_CS2_BASE) & defined(CFG_CS2_SIZE) & \
-    defined(CFG_CS2_WIDTH) & defined(CFG_CS2_RO) & \
-	defined(CFG_CS2_WS)
+    defined(CFG_CS2_WIDTH) & defined(CFG_CS2_WS)
 
 	MCFCSM_CSAR2 = (CFG_CS2_BASE >> 16) & 0xFFFF;
 
@@ -505,8 +502,7 @@ void cpu_init_f(void)
 #endif
 
 #if defined(CFG_CS3_BASE) & defined(CFG_CS3_SIZE) & \
-    defined(CFG_CS3_WIDTH) & defined(CFG_CS3_RO) & \
-	defined(CFG_CS3_WS)
+    defined(CFG_CS3_WIDTH) & defined(CFG_CS3_WS)
 
 	MCFCSM_CSAR3 = (CFG_CS3_BASE >> 16) & 0xFFFF;
 

+ 1 - 1
cpu/mcf52x2/speed.c

@@ -69,7 +69,7 @@ int get_clocks (void)
 
 	/* Setup PLL */
 	pll->syncr = 0x01080000;
-	while (!(pll->synsr & FMPLL_SYNSR_LOCK)
+	while (!(pll->synsr & FMPLL_SYNSR_LOCK))
 		;
 	pll->syncr = 0x01000000;
 	while (!(pll->synsr & FMPLL_SYNSR_LOCK))

+ 6 - 0
cpu/mcf5445x/config.mk

@@ -29,3 +29,9 @@ PLATFORM_CPPFLAGS += -mcpu=54455 -fPIC
 else
 PLATFORM_CPPFLAGS += -m5407 -fPIC
 endif
+
+ifneq (,$(findstring -linux-,$(shell $(CC) --version)))
+ifneq (,$(findstring GOT,$(shell $(LD) --help)))
+PLATFORM_LDFLAGS += --got=single
+endif
+endif

+ 1 - 1
cpu/mcf5445x/cpu_init.c

@@ -110,7 +110,7 @@ void cpu_init_f(void)
  */
 int cpu_init_r(void)
 {
-#ifdef CONFIG_MCFTMR
+#ifdef CONFIG_MCFRTC
 	volatile rtc_t *rtc = (volatile rtc_t *)(CFG_MCFRTC_BASE);
 	volatile rtcex_t *rtcex = (volatile rtcex_t *)&rtc->extended;
 

+ 1 - 1
cpu/mcf5445x/start.S

@@ -253,7 +253,7 @@ clear_bss:
 /* exception code */
 	.globl _fault
 _fault:
-	jmp _fault
+	bra _fault
 	.globl	_exc_handler
 
 _exc_handler:

+ 6 - 0
cpu/mcf547x_8x/config.mk

@@ -29,3 +29,9 @@ PLATFORM_CPPFLAGS += -mcpu=5485 -fPIC
 else
 PLATFORM_CPPFLAGS += -m5407 -fPIC
 endif
+
+ifneq (,$(findstring -linux-,$(shell $(CC) --version)))
+ifneq (,$(findstring GOT,$(shell $(LD) --help)))
+PLATFORM_LDFLAGS += --got=single
+endif
+endif

+ 1 - 1
cpu/mcf547x_8x/start.S

@@ -259,7 +259,7 @@ clear_bss:
 /* exception code */
 	.globl _fault
 _fault:
-	jmp _fault
+	bra _fault
 	.globl	_exc_handler
 
 _exc_handler:

+ 2 - 2
drivers/serial/mcfuart.c

@@ -63,8 +63,8 @@ int serial_init(void)
 	uart->umr = UART_UMR_SB_STOP_BITS_1;
 
 	/* Setting up BaudRate */
-	counter = (u32) (gd->bus_clk / (gd->baudrate));
-	counter >>= 5;
+	counter = (u32) ((gd->bus_clk / 32) + (gd->baudrate / 2));
+	counter = counter / gd->baudrate;
 
 	/* write to CTUR: divide counter upper byte */
 	uart->ubg1 = (u8) ((counter & 0xff00) >> 8);

+ 1 - 1
include/asm-m68k/timer.h

@@ -33,7 +33,7 @@
 /****************************************************************************/
 /* DMA Timer module registers */
 typedef struct dtimer_ctrl {
-#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
+#if defined(CONFIG_M5249) || defined(CONFIG_M5253) || defined(CONFIG_M5272)
 	u16 tmr;		/* 0x00 Mode register */
 	u16 res1;		/* 0x02 */
 	u16 trr;		/* 0x04 Reference register */

+ 2 - 0
include/configs/EB+MCF-EV123.h

@@ -84,6 +84,8 @@
 #define CONFIG_CMD_MII
 #define CONFIG_CMD_NET
 
+#define CONFIG_MCFTMR
+
 #define CONFIG_MCFFEC
 #ifdef CONFIG_MCFFEC
 #	define CONFIG_NET_MULTI		1

+ 2 - 2
include/configs/M5475EVB.h

@@ -303,9 +303,9 @@
 #define CFG_CS0_CTRL		0x00101980
 
 #ifdef CFG_NOR1SZ
-#define CFG_CS1_BASE		0xF8000000
+#define CFG_CS1_BASE		0xE0000000
 #define CFG_CS1_MASK		(((CFG_NOR1SZ << 20) - 1) & 0xFFFF0001)
-#define CFG_CS1_CTRL		0x00000D80
+#define CFG_CS1_CTRL		0x00101D80
 #endif
 
 #endif				/* _M5475EVB_H */

+ 2 - 2
include/configs/M5485EVB.h

@@ -289,9 +289,9 @@
 #define CFG_CS0_CTRL		0x00101980
 
 #ifdef CFG_NOR1SZ
-#define CFG_CS1_BASE		0xF8000000
+#define CFG_CS1_BASE		0xE0000000
 #define CFG_CS1_MASK		(((CFG_NOR1SZ << 20) - 1) & 0xFFFF0001)
-#define CFG_CS1_CTRL		0x00000D80
+#define CFG_CS1_CTRL		0x00101D80
 #endif
 
 #endif				/* _M5485EVB_H */

+ 3 - 3
lib_m68k/board.c

@@ -176,7 +176,7 @@ typedef int (init_fnc_t) (void);
 
 static int init_baudrate (void)
 {
-	uchar tmp[64];	/* long enough for environment variables */
+	char tmp[64];	/* long enough for environment variables */
 	int i = getenv_r ("baudrate", tmp, sizeof (tmp));
 
 	gd->baudrate = (i > 0)
@@ -267,7 +267,7 @@ board_init_f (ulong bootflag)
 #ifdef CONFIG_PRAM
 	int i;
 	ulong reg;
-	uchar tmp[64];		/* long enough for environment variables */
+	char tmp[64];		/* long enough for environment variables */
 #endif
 
 	/* Pointer is writable since we allocated a register for it */
@@ -752,7 +752,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
 	 */
 	{
 		ulong pram;
-		uchar memsz[32];
+		char memsz[32];
 #ifdef CONFIG_PRAM
 		char *s;