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@@ -11,6 +11,7 @@
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*/
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*/
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#include <common.h>
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#include <common.h>
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+#include <hwconfig.h>
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#include <i2c.h>
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#include <i2c.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/fsl_serdes.h>
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#include <asm/fsl_serdes.h>
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@@ -18,12 +19,12 @@
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#include <tsec.h>
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#include <tsec.h>
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#include <libfdt.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <fdt_support.h>
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+#include <fsl_esdhc.h>
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#include "pci.h"
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#include "pci.h"
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#include "../common/pq-mds-pib.h"
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#include "../common/pq-mds-pib.h"
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int board_early_init_f(void)
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int board_early_init_f(void)
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{
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{
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- struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
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u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;
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u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;
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/* Enable flash write */
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/* Enable flash write */
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@@ -31,18 +32,6 @@ int board_early_init_f(void)
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/* Clear all of the interrupt of BCSR */
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/* Clear all of the interrupt of BCSR */
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bcsr[0xe] = 0xff;
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bcsr[0xe] = 0xff;
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-#ifdef CONFIG_MMC
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- /* Set SPI_SD, SER_SD, and IRQ4_WP so that SD signals go through */
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- bcsr[0xc] |= 0x4c;
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-
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- /* Set proper bits in SICR to allow SD signals through */
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- clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
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-
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- clrsetbits_be32(&im->sysconf.sicrh, (SICRH_GPIO2_E | SICRH_SPI),
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- (SICRH_GPIO2_E_SD | SICRH_SPI_SD));
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-
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-#endif
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-
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#ifdef CONFIG_FSL_SERDES
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#ifdef CONFIG_FSL_SERDES
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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u32 spridr = in_be32(&immr->sysconf.spridr);
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u32 spridr = in_be32(&immr->sysconf.spridr);
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@@ -72,6 +61,27 @@ int board_early_init_f(void)
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return 0;
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return 0;
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}
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}
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+#ifdef CONFIG_FSL_ESDHC
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+int board_mmc_init(bd_t *bd)
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+{
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+ struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
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+ u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;
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+
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+ if (!hwconfig("esdhc"))
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+ return 0;
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+
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+ /* Set SPI_SD, SER_SD, and IRQ4_WP so that SD signals go through */
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+ bcsr[0xc] |= 0x4c;
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+
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+ /* Set proper bits in SICR to allow SD signals through */
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+ clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
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+ clrsetbits_be32(&im->sysconf.sicrh, SICRH_GPIO2_E | SICRH_SPI,
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+ SICRH_GPIO2_E_SD | SICRH_SPI_SD);
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+
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+ return fsl_esdhc_mmc_init(bd);
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+}
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+#endif
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+
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#if defined(CONFIG_TSEC1) || defined(CONFIG_TSEC2)
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#if defined(CONFIG_TSEC1) || defined(CONFIG_TSEC2)
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int board_eth_init(bd_t *bd)
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int board_eth_init(bd_t *bd)
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{
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{
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@@ -322,6 +332,7 @@ void ft_board_setup(void *blob, bd_t *bd)
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ft_cpu_setup(blob, bd);
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ft_cpu_setup(blob, bd);
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ft_tsec_fixup(blob, bd);
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ft_tsec_fixup(blob, bd);
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fdt_fixup_dr_usb(blob, bd);
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fdt_fixup_dr_usb(blob, bd);
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+ fdt_fixup_esdhc(blob, bd);
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#ifdef CONFIG_PCI
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#ifdef CONFIG_PCI
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ft_pci_setup(blob, bd);
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ft_pci_setup(blob, bd);
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if (board_pci_host_broken())
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if (board_pci_host_broken())
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