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@@ -28,6 +28,8 @@
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#define BR_BA 0xFFFF8000
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#define BR_BA_SHIFT 15
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+#define BR_XBA 0x00006000
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+#define BR_XBA_SHIFT 13
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#define BR_PS 0x00001800
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#define BR_PS_SHIFT 11
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#define BR_PS_8 0x00000800 /* Port Size 8 bit */
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@@ -70,7 +72,7 @@
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#endif
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/* Convert an address into the right format for the BR registers */
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-#ifdef CONFIG_PHYS_64BIT
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+#if defined(CONFIG_PHYS_64BIT) && !defined(CONFIG_FSL_ELBC)
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#define BR_PHYS_ADDR(x) ((unsigned long)((x & 0x0ffff8000ULL) | \
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((x & 0x300000000ULL) >> 19)))
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#else
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@@ -90,6 +92,8 @@
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#define OR_GPCM_AM 0xFFFF8000
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#define OR_GPCM_AM_SHIFT 15
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+#define OR_GPCM_XAM 0x00006000
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+#define OR_GPCM_XAM_SHIFT 13
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#define OR_GPCM_BCTLD 0x00001000
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#define OR_GPCM_BCTLD_SHIFT 12
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#define OR_GPCM_CSNT 0x00000800
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@@ -132,6 +136,8 @@
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#define OR_FCM_AM 0xFFFF8000
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#define OR_FCM_AM_SHIFT 15
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+#define OR_FCM_XAM 0x00006000
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+#define OR_FCM_XAM_SHIFT 13
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#define OR_FCM_BCTLD 0x00001000
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#define OR_FCM_BCTLD_SHIFT 12
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#define OR_FCM_PGS 0x00000400
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