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@@ -299,6 +299,16 @@ void mpc85xx_reginfo(void)
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/* Common ddr init for non-corenet fsl 85xx platforms */
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/* Common ddr init for non-corenet fsl 85xx platforms */
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#ifndef CONFIG_FSL_CORENET
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#ifndef CONFIG_FSL_CORENET
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+#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_SYS_INIT_L2_ADDR)
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+phys_size_t initdram(int board_type)
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+{
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+#if defined(CONFIG_SPD_EEPROM) || defined(CONFIG_DDR_SPD)
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+ return fsl_ddr_sdram_size();
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+#else
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+ return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
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+#endif
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+}
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+#else /* CONFIG_SYS_RAMBOOT */
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phys_size_t initdram(int board_type)
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phys_size_t initdram(int board_type)
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{
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{
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phys_size_t dram_size = 0;
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phys_size_t dram_size = 0;
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@@ -348,6 +358,7 @@ phys_size_t initdram(int board_type)
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puts("DDR: ");
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puts("DDR: ");
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return dram_size;
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return dram_size;
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}
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}
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+#endif /* CONFIG_SYS_RAMBOOT */
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#endif
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#endif
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#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
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#if CONFIG_POST & CONFIG_SYS_POST_MEMORY
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