Jelajahi Sumber

sh3/sh4: rename config option TMU_CLK_DIVIDER to CONFIG_SYS_TMU_CLK_DIV

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Jean-Christophe PLAGNIOL-VILLARD 16 tahun lalu
induk
melakukan
be45c63256

+ 1 - 1
include/configs/MigoR.h

@@ -141,7 +141,7 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ		1000
 
 #endif	/* __MIGO_R_H */

+ 1 - 1
include/configs/ap325rxa.h

@@ -170,7 +170,7 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ		1000
 
 #endif	/* __AP325RXA_H */

+ 1 - 1
include/configs/mpr2.h

@@ -82,7 +82,7 @@
 
 /* Clocks */
 #define CONFIG_SYS_CLK_FREQ	24000000
-#define TMU_CLK_DIVIDER		4	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_TMU_CLK_DIV		4	/* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ		1000
 
 /* UART */

+ 1 - 1
include/configs/ms7720se.h

@@ -101,7 +101,7 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		4	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_TMU_CLK_DIV		4	/* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ		1000
 
 /* PCMCIA */

+ 1 - 1
include/configs/ms7722se.h

@@ -128,7 +128,7 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ		1000
 
 #endif	/* __MS7722SE_H */

+ 1 - 1
include/configs/ms7750se.h

@@ -101,7 +101,7 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		4
+#define CONFIG_SYS_TMU_CLK_DIV		4
 #define CONFIG_SYS_HZ		1000
 
 #endif /* __MS7750SE_H */

+ 1 - 1
include/configs/r2dplus.h

@@ -80,7 +80,7 @@
  * SuperH Clock setting
  */
 #define CONFIG_SYS_CLK_FREQ	60000000
-#define TMU_CLK_DIVIDER		4
+#define CONFIG_SYS_TMU_CLK_DIV		4
 #define CONFIG_SYS_HZ		1000
 #define	CONFIG_SYS_PLL_SETTLING_TIME	100/* in us */
 

+ 1 - 1
include/configs/r7780mp.h

@@ -121,7 +121,7 @@
 
 /* Board Clock */
 #define CONFIG_SYS_CLK_FREQ	33333333
-#define TMU_CLK_DIVIDER		4
+#define CONFIG_SYS_TMU_CLK_DIV		4
 #define CONFIG_SYS_HZ		1000
 
 /* PCI Controller */

+ 1 - 1
include/configs/sh7763rdp.h

@@ -114,7 +114,7 @@
 
 /* Clock */
 #define CONFIG_SYS_CLK_FREQ	66666666
-#define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
+#define CONFIG_SYS_TMU_CLK_DIV		(4)	/* 4 (default), 16, 64, 256 or 1024 */
 #define CONFIG_SYS_HZ		1000
 
 /* Ether */

+ 1 - 1
include/configs/sh7785lcr.h

@@ -186,7 +186,7 @@
 /* Board Clock */
 /* The SCIF used external clock. system clock only used timer. */
 #define CONFIG_SYS_CLK_FREQ	50000000
-#define TMU_CLK_DIVIDER		4
+#define CONFIG_SYS_TMU_CLK_DIV		4
 #define CONFIG_SYS_HZ		1000
 
 #endif	/* __SH7785LCR_H */

+ 2 - 2
lib_sh/time.c

@@ -69,10 +69,10 @@ static void tmu_timer_stop (unsigned int timer)
 
 int timer_init (void)
 {
-	/* Divide clock by TMU_CLK_DIVIDER */
+	/* Divide clock by CONFIG_SYS_TMU_CLK_DIV */
 	u16 bit = 0;
 
-	switch (TMU_CLK_DIVIDER) {
+	switch (CONFIG_SYS_TMU_CLK_DIV) {
 	case 1024:
 		bit = 4;
 		break;