u-boot: imx-regs: Add QuadSPI register and base address

quadspi struct and QSPI1_BASE_ADDR definitions are added

Signed-off-by: Juan Gutierrez <b44802@freescale.com>

arch/arm/include/asm/arch-vf610/imx-regs.h

@@ -100,6 +100,7 @@
 #define DDR_BASE_ADDR		(AIPS1_BASE_ADDR + 0x0002E000)
 #define ESDHC0_BASE_ADDR	(AIPS1_BASE_ADDR + 0x00031000)
 #define ESDHC1_BASE_ADDR	(AIPS1_BASE_ADDR + 0x00032000)
+#define QSPI1_BASE_ADDR		(AIPS1_BASE_ADDR + 0x00044000)
 #define ENET_BASE_ADDR		(AIPS1_BASE_ADDR + 0x00050000)
 
 /*GPIO*/
@@ -419,6 +420,51 @@ struct mscm_ir {
 	u16 rsvd3[848];
 };
 
+/* QuadSPI */
+struct quadspi {
+	u32 mcr;
+	u8  rsvd0[4];
+	u32 ipcr;
+	u32 flshcr;
+	u32 buf0cr;
+	u32 buf1cr;
+	u32 buf2cr;
+	u32 buf3cr;
+	u32 bfgencr;
+	u32 soccr;
+	u8  rsvd1[8];
+	u32 buf0ind;
+	u32 buf1ind;
+	u32 buf2ind;
+	u8  rsvd2[196];
+	u32 sfar;
+	u8  rsvd3[4];
+	u32 smpr;
+	u32 rbsr;
+	u32 rbct;
+	u8  rsvd4[60];
+	u32 tbsr;
+	u32 tbdr;
+	u8  rsvd5[4];
+	u32 sr;
+	u32 fr;
+	u32 rser;
+	u32 spndst;
+	u32 sptrclr;
+	u8  rsvd6[16];
+	u32 sfa1ad;
+	u32 sfa2ad;
+	u32 sfb1ad;
+	u32 sfb2ad;
+	u8  rsvd7[112];
+	u32 rbdr[32];
+	u8  rsvd_8[128];
+	u32 lutkey;
+	u32 lckcr;
+	u8  rsvd9[8];
+	u32 lut[64];
+};
+
 #endif	/* __ASSEMBLER__*/
 
 #endif	/* __ASM_ARCH_IMX_REGS_H__ */