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@@ -34,6 +34,7 @@
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#include <asm/errno.h>
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#include <i2c.h>
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#include <mmc.h>
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+#include <pmic.h>
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#include <fsl_esdhc.h>
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#include <fsl_pmic.h>
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#include <mc13892.h>
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@@ -313,59 +314,63 @@ static void reset_peripherals(int reset)
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static void power_init_mx51(void)
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{
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unsigned int val;
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+ struct pmic *p;
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+
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+ pmic_init();
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+ p = get_pmic();
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/* Write needed to Power Gate 2 register */
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- val = pmic_reg_read(REG_POWER_MISC);
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+ pmic_reg_read(p, REG_POWER_MISC, &val);
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/* enable VCAM with 2.775V to enable read from PMIC */
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val = VCAMCONFIG | VCAMEN;
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- pmic_reg_write(REG_MODE_1, val);
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+ pmic_reg_write(p, REG_MODE_1, val);
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/*
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* Set switchers in Auto in NORMAL mode & STANDBY mode
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* Setup the switcher mode for SW1 & SW2
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*/
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- val = pmic_reg_read(REG_SW_4);
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+ pmic_reg_read(p, REG_SW_4, &val);
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val = (val & ~((SWMODE_MASK << SWMODE1_SHIFT) |
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(SWMODE_MASK << SWMODE2_SHIFT)));
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val |= (SWMODE_AUTO_AUTO << SWMODE1_SHIFT) |
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(SWMODE_AUTO_AUTO << SWMODE2_SHIFT);
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- pmic_reg_write(REG_SW_4, val);
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+ pmic_reg_write(p, REG_SW_4, val);
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/* Setup the switcher mode for SW3 & SW4 */
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- val = pmic_reg_read(REG_SW_5);
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+ pmic_reg_read(p, REG_SW_5, &val);
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val &= ~((SWMODE_MASK << SWMODE4_SHIFT) |
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(SWMODE_MASK << SWMODE3_SHIFT));
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val |= (SWMODE_AUTO_AUTO << SWMODE4_SHIFT) |
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(SWMODE_AUTO_AUTO << SWMODE3_SHIFT);
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- pmic_reg_write(REG_SW_5, val);
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+ pmic_reg_write(p, REG_SW_5, val);
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/* Set VGEN3 to 1.8V, VCAM to 3.0V */
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- val = pmic_reg_read(REG_SETTING_0);
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+ pmic_reg_read(p, REG_SETTING_0, &val);
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val &= ~(VCAM_MASK | VGEN3_MASK);
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val |= VCAM_3_0;
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- pmic_reg_write(REG_SETTING_0, val);
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+ pmic_reg_write(p, REG_SETTING_0, val);
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/* Set VVIDEO to 2.775V, VAUDIO to 3V0, VSD to 1.8V */
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- val = pmic_reg_read(REG_SETTING_1);
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+ pmic_reg_read(p, REG_SETTING_1, &val);
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val &= ~(VVIDEO_MASK | VSD_MASK | VAUDIO_MASK);
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val |= VVIDEO_2_775 | VAUDIO_3_0 | VSD_1_8;
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- pmic_reg_write(REG_SETTING_1, val);
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+ pmic_reg_write(p, REG_SETTING_1, val);
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/* Configure VGEN3 and VCAM regulators to use external PNP */
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val = VGEN3CONFIG | VCAMCONFIG;
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- pmic_reg_write(REG_MODE_1, val);
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+ pmic_reg_write(p, REG_MODE_1, val);
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udelay(200);
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/* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */
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val = VGEN3EN | VGEN3CONFIG | VCAMEN | VCAMCONFIG |
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VVIDEOEN | VAUDIOEN | VSDEN;
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- pmic_reg_write(REG_MODE_1, val);
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+ pmic_reg_write(p, REG_MODE_1, val);
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- val = pmic_reg_read(REG_POWER_CTL2);
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+ pmic_reg_read(p, REG_POWER_CTL2, &val);
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val |= WDIRESET;
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- pmic_reg_write(REG_POWER_CTL2, val);
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+ pmic_reg_write(p, REG_POWER_CTL2, val);
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udelay(2500);
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