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@@ -210,6 +210,11 @@ int eth_init (bd_t * bd)
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p_mac->EMAC_CFG |= AT91C_EMAC_RMII;
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#endif
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+#if (AT91C_MASTER_CLOCK > 40000000)
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+ /* MDIO clock must not exceed 2.5 MHz, so enable MCK divider */
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+ p_mac->EMAC_CFG |= AT91C_EMAC_CLK_HCLK_64;
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+#endif
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+
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p_mac->EMAC_CTL |= AT91C_EMAC_TE | AT91C_EMAC_RE;
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at91rm92000_GetPhyInterface (& PhyOps);
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