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@@ -93,11 +93,19 @@ int checkboard(void)
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/* Choose the 11.2896Mhz codec reference clock */
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/* Choose the 11.2896Mhz codec reference clock */
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#define CONFIG_PIXIS_BRDCFG1_AUDCLK_11 0x01
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#define CONFIG_PIXIS_BRDCFG1_AUDCLK_11 0x01
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+/* Connect to USB2 */
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+#define CONFIG_PIXIS_BRDCFG0_USB2 0x10
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+/* Connect to TFM bus */
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+#define CONFIG_PIXIS_BRDCFG1_TDM 0x0c
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+/* Connect to SPI */
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+#define CONFIG_PIXIS_BRDCFG0_SPI 0x80
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+
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int misc_init_r(void)
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int misc_init_r(void)
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{
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{
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u8 temp;
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u8 temp;
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const char *audclk;
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const char *audclk;
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size_t arglen;
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size_t arglen;
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+ ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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/* For DVI, enable the TFP410 Encoder. */
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/* For DVI, enable the TFP410 Encoder. */
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@@ -115,22 +123,48 @@ int misc_init_r(void)
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return -1;
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return -1;
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debug("DVI Encoder Read: 0x%02x\n",temp);
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debug("DVI Encoder Read: 0x%02x\n",temp);
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+ /* Enable the USB2 in PMUXCR2 and FGPA */
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+ if (hwconfig("usb2")) {
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+ clrsetbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_ETSECUSB_MASK,
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+ MPC85xx_PMUXCR2_USB);
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+ setbits_8(&pixis->brdcfg0, CONFIG_PIXIS_BRDCFG0_USB2);
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+ }
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+
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+ /* tdm and audio can not enable simultaneous*/
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+ if (hwconfig("tdm") && hwconfig("audclk")){
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+ printf("WARNING: TDM and AUDIO can not be enabled simultaneous !\n");
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+ return -1;
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+ }
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+
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+ /* Enable the TDM in PMUXCR and FGPA */
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+ if (hwconfig("tdm")) {
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+ clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TDM_MASK,
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+ MPC85xx_PMUXCR_TDM);
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+ setbits_8(&pixis->brdcfg1, CONFIG_PIXIS_BRDCFG1_TDM);
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+ /* TDM need some configration option by SPI */
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+ clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SPI_MASK,
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+ MPC85xx_PMUXCR_SPI);
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+ setbits_8(&pixis->brdcfg0, CONFIG_PIXIS_BRDCFG0_SPI);
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+ }
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+
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/*
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/*
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* Enable the reference clock for the WM8776 codec, and route the MUX
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* Enable the reference clock for the WM8776 codec, and route the MUX
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* pins for SSI. The default is the 12.288 MHz clock
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* pins for SSI. The default is the 12.288 MHz clock
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*/
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*/
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- temp = in_8(&pixis->brdcfg1) & ~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK |
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- CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK);
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- temp |= CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI;
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-
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- audclk = hwconfig_arg("audclk", &arglen);
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- /* Check the first two chars only */
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- if (audclk && (strncmp(audclk, "11", 2) == 0))
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- temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_11;
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- else
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- temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_12;
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- out_8(&pixis->brdcfg1, temp);
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+ if (hwconfig("audclk")) {
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+ temp = in_8(&pixis->brdcfg1) & ~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK |
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+ CONFIG_PIXIS_BRDCFG1_AUDCLK_MASK);
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+ temp |= CONFIG_PIXIS_BRDCFG1_SSI_TDM_SSI;
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+
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+ audclk = hwconfig_arg("audclk", &arglen);
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+ /* Check the first two chars only */
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+ if (audclk && (strncmp(audclk, "11", 2) == 0))
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+ temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_11;
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+ else
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+ temp |= CONFIG_PIXIS_BRDCFG1_AUDCLK_12;
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+ setbits_8(&pixis->brdcfg1, temp);
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+ }
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return 0;
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return 0;
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}
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}
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