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@@ -65,48 +65,49 @@
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#define CFG_SDRAM_BASE CFG_DDR_BASE
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/* DDR Controller Configuration
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-
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-SYS_CFG:
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- [31:31] MDDRC Soft Reset: Diabled
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- [30:30] DRAM CKE pin: Enabled
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- [29:29] DRAM CLK: Enabled
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- [28:28] Command Mode: Enabled (For initialization only)
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- [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10]
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- [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10]
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- [20:19] Read Test: DON'T USE
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- [18:18] Self Refresh: Enabled
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- [17:17] 16bit Mode: Disabled
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- [16:13] Ready Delay: 2
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- [12:12] Half DQS Delay: Disabled
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- [11:11] Quarter DQS Delay: Disabled
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- [10:08] Write Delay: 2
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- [07:07] Early ODT: Disabled
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- [06:06] On DIE Termination: Disabled
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- [05:05] FIFO Overflow Clear: DON'T USE here
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- [04:04] FIFO Underflow Clear: DON'T USE here
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- [03:03] FIFO Overflow Pending: DON'T USE here
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- [02:02] FIFO Underlfow Pending: DON'T USE here
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- [01:01] FIFO Overlfow Enabled: Enabled
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- [00:00] FIFO Underflow Enabled: Enabled
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- TIME_CFG0
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- [31:16] DRAM Refresh Time: 0 CSB clocks
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- [15:8] DRAM Command Time: 0 CSB clocks
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- [07:00] DRAM Precharge Time: 0 CSB clocks
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- TIME_CFG1
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- [31:26] DRAM tRFC:
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- [25:21] DRAM tWR1:
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- [20:17] DRAM tWRT1:
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- [16:11] DRAM tDRR:
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- [10:05] DRAM tRC:
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- [04:00] DRAM tRAS:
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- TIME_CFG2
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- [31:28] DRAM tRCD:
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- [27:23] DRAM tFAW:
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- [22:19] DRAM tRTW1:
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- [18:15] DRAM tCCD:
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- [14:10] DRAM tRTP:
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- [09:05] DRAM tRP:
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- [04:00] DRAM tRPA */
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+ *
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+ * SYS_CFG:
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+ * [31:31] MDDRC Soft Reset: Diabled
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+ * [30:30] DRAM CKE pin: Enabled
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+ * [29:29] DRAM CLK: Enabled
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+ * [28:28] Command Mode: Enabled (For initialization only)
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+ * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10]
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+ * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10]
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+ * [20:19] Read Test: DON'T USE
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+ * [18:18] Self Refresh: Enabled
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+ * [17:17] 16bit Mode: Disabled
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+ * [16:13] Ready Delay: 2
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+ * [12:12] Half DQS Delay: Disabled
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+ * [11:11] Quarter DQS Delay: Disabled
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+ * [10:08] Write Delay: 2
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+ * [07:07] Early ODT: Disabled
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+ * [06:06] On DIE Termination: Disabled
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+ * [05:05] FIFO Overflow Clear: DON'T USE here
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+ * [04:04] FIFO Underflow Clear: DON'T USE here
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+ * [03:03] FIFO Overflow Pending: DON'T USE here
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+ * [02:02] FIFO Underlfow Pending: DON'T USE here
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+ * [01:01] FIFO Overlfow Enabled: Enabled
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+ * [00:00] FIFO Underflow Enabled: Enabled
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+ * TIME_CFG0
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+ * [31:16] DRAM Refresh Time: 0 CSB clocks
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+ * [15:8] DRAM Command Time: 0 CSB clocks
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+ * [07:00] DRAM Precharge Time: 0 CSB clocks
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+ * TIME_CFG1
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+ * [31:26] DRAM tRFC:
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+ * [25:21] DRAM tWR1:
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+ * [20:17] DRAM tWRT1:
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+ * [16:11] DRAM tDRR:
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+ * [10:05] DRAM tRC:
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+ * [04:00] DRAM tRAS:
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+ * TIME_CFG2
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+ * [31:28] DRAM tRCD:
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+ * [27:23] DRAM tFAW:
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+ * [22:19] DRAM tRTW1:
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+ * [18:15] DRAM tCCD:
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+ * [14:10] DRAM tRTP:
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+ * [09:05] DRAM tRP:
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+ * [04:00] DRAM tRPA
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+ */
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#define CFG_MDDRC_SYS_CFG 0xF8604200
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#define CFG_MDDRC_SYS_CFG_RUN 0xE8604200
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@@ -276,7 +277,7 @@ SYS_CFG:
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#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
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| CFG_CMD_NET \
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| CFG_CMD_PING \
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- | CFG_CMD_MII \
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+ | CFG_CMD_MII \
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| CFG_CMD_I2C)
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#endif
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@@ -384,26 +385,26 @@ SYS_CFG:
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"bootm\0" \
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"load=tftp 100000 /tftpboot/ads5121/u-boot.bin\0" \
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"update=protect off fff00000 fff3ffff; " \
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- "era fff00000 fff3ffff; cp.b 100000 fff00000 ${filesize}\0" \
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+ "era fff00000 fff3ffff; cp.b 100000 fff00000 ${filesize}\0" \
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"upd=run load;run update\0" \
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""
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-#define CONFIG_NFSBOOTCOMMAND \
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- "setenv bootargs root=/dev/nfs rw " \
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- "nfsroot=$serverip:$rootpath " \
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- "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
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- "console=$consoledev,$baudrate $othbootargs;" \
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- "tftp $loadaddr $bootfile;" \
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- "tftp $fdtaddr $fdtfile;" \
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- "bootm $loadaddr - $fdtaddr"
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+#define CONFIG_NFSBOOTCOMMAND \
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+ "setenv bootargs root=/dev/nfs rw " \
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+ "nfsroot=$serverip:$rootpath " \
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+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
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+ "console=$consoledev,$baudrate $othbootargs;" \
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+ "tftp $loadaddr $bootfile;" \
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+ "tftp $fdtaddr $fdtfile;" \
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+ "bootm $loadaddr - $fdtaddr"
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#define CONFIG_RAMBOOTCOMMAND \
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- "setenv bootargs root=/dev/ram rw " \
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- "console=$consoledev,$baudrate $othbootargs;" \
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- "tftp $ramdiskaddr $ramdiskfile;" \
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- "tftp $loadaddr $bootfile;" \
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- "tftp $fdtaddr $fdtfile;" \
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- "bootm $loadaddr $ramdiskaddr $fdtaddr"
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+ "setenv bootargs root=/dev/ram rw " \
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+ "console=$consoledev,$baudrate $othbootargs;" \
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+ "tftp $ramdiskaddr $ramdiskfile;" \
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+ "tftp $loadaddr $bootfile;" \
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+ "tftp $fdtaddr $fdtfile;" \
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+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
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#define CONFIG_BOOTCOMMAND "run flash_self"
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Wolfgang Denk