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@@ -0,0 +1,892 @@
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+/*
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+ * (C) Copyright 2003 Motorola Inc.
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+ * Xianghua Xiao,(X.Xiao@motorola.com)
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+ *
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+ * (C) Copyright 2000, 2001
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+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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+ *
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+ * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com
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+ * Add support the Sharp chips on the mpc8260ads.
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+ * I started with board/ip860/flash.c and made changes I found in
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+ * the MTD project by David Schleef.
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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+
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+#include <common.h>
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+
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+#if !defined(CFG_NO_FLASH)
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+
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+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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+
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+#if defined(CFG_ENV_IS_IN_FLASH)
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+# ifndef CFG_ENV_ADDR
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+# define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
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+# endif
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+# ifndef CFG_ENV_SIZE
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+# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
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+# endif
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+# ifndef CFG_ENV_SECT_SIZE
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+# define CFG_ENV_SECT_SIZE CFG_ENV_SIZE
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+# endif
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+#endif
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+
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+/*
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+ * The variable should be in the flash info structure. Since it
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+ * is only used in this board specific file it is declared here.
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+ * In the future I think an endian flag should be part of the
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+ * flash_info_t structure. (Ron Alder)
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+ */
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+static ulong big_endian = 0;
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+
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+/*-----------------------------------------------------------------------
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+ * Functions
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+ */
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+static ulong flash_get_size (vu_long *addr, flash_info_t *info);
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+static int write_block (flash_info_t *info, uchar * src, ulong dest, ulong cnt);
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+static int write_short (flash_info_t *info, ulong dest, ushort data);
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+static int write_word (flash_info_t *info, ulong dest, ulong data);
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+static int clear_block_lock_bit(flash_info_t *info, vu_long * addr);
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+/*-----------------------------------------------------------------------
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+ */
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+
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+unsigned long flash_init (void)
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+{
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+ unsigned long size;
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+ int i;
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+
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+ /* Init: enable write,
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+ * or we cannot even write flash commands
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+ */
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+ for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
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+ flash_info[i].flash_id = FLASH_UNKNOWN;
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+
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+ /* set the default sector offset */
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+ }
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+
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+ /* Static FLASH Bank configuration here - FIXME XXX */
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+
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+ size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
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+
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+ if (flash_info[0].flash_id == FLASH_UNKNOWN) {
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+ printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
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+ size, size<<20);
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+ }
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+
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+ /* Re-do sizing to get full correct info */
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+ size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]);
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+
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+ flash_info[0].size = size;
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+
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+#if !defined(CONFIG_RAM_AS_FLASH)
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+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
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+ /* monitor protection ON by default */
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+ flash_protect(FLAG_PROTECT_SET,
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+ CFG_MONITOR_BASE,
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+ CFG_MONITOR_BASE+monitor_flash_len-1,
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+ &flash_info[0]);
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+#endif
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+
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+#ifdef CFG_ENV_IS_IN_FLASH
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+ /* ENV protection ON by default */
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+ flash_protect(FLAG_PROTECT_SET,
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+ CFG_ENV_ADDR,
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+ CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1,
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+ &flash_info[0]);
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+#endif
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+#endif
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+ return (size);
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+}
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+
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+/*-----------------------------------------------------------------------
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+ */
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+void flash_print_info (flash_info_t *info)
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+{
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+ int i;
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+
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+ if (info->flash_id == FLASH_UNKNOWN) {
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+ printf ("missing or unknown FLASH type\n");
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+ return;
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+ }
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+
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+ switch (info->flash_id & FLASH_VENDMASK) {
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+ case FLASH_MAN_INTEL: printf ("Intel "); break;
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+ case FLASH_MAN_SHARP: printf ("Sharp "); break;
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+ default: printf ("Unknown Vendor "); break;
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+ }
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+
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+ switch (info->flash_id & FLASH_TYPEMASK) {
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+ case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n");
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+ break;
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+ case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n");
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+ break;
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+ case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n");
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+ break;
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+ case FLASH_LH28F016SCT: printf ("28F016SC (16 Mbit, 32 x 64K)\n");
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+ break;
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+ case FLASH_28F640J3A: printf ("28F640J3A (64 Mbit, 64 x 128K)\n");
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+ break;
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+ default: printf ("Unknown Chip Type\n");
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+ break;
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+ }
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+
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+ printf (" Size: %ld MB in %d Sectors\n",
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+ info->size >> 20, info->sector_count);
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+
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+ printf (" Sector Start Addresses:");
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+ for (i=0; i<info->sector_count; ++i) {
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+ if ((i % 5) == 0)
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+ printf ("\n ");
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+ printf (" %08lX%s",
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+ info->start[i],
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+ info->protect[i] ? " (RO)" : " "
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+ );
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+ }
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+ printf ("\n");
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+}
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+
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+ /* only deal with 16 bit and 32 bit port width, 16bit chip */
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+static ulong flash_get_size (vu_long *addr, flash_info_t *info)
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+{
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+ short i;
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+ ulong value,va,vb,vc,vd;
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+ ulong base = (ulong)addr;
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+ ulong sector_offset;
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+
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+#ifdef DEBUG
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+ printf("Check flash at 0x%08x\n",(uint)addr);
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+#endif
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+ /* Write "Intelligent Identifier" command: read Manufacturer ID */
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+ *addr = 0x90909090;
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+ udelay(20);
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+ asm("sync");
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+
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+#ifndef CFG_FLASH_CFI
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+ printf("Not define CFG_FLASH_CFI\n");
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+ return (0);
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+#else
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+ value = addr[0];
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+ va=(value & 0xFF000000)>>24;
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+ vb=(value & 0x00FF0000)>>16;
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+ vc=(value & 0x0000FF00)>>8;
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+ vd=(value & 0x000000FF);
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+ if ((va==0) && (vb==0)) {
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+ printf("cannot identify Flash\n");
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+ info->flash_id = FLASH_UNKNOWN;
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+ info->sector_count = 0;
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+ info->size = 0;
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+ return (0); /* no or unknown flash */
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+ }
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+ else if ((va==0) && (vb!=0)) {
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+ big_endian = 1;
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+ info->chipwidth = FLASH_CFI_BY16;
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+ if(vb == vd) info->portwidth = FLASH_CFI_32BIT;
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+ else info->portwidth = FLASH_CFI_16BIT;
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+ }
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+ else if ((va!=0) && (vb==0)) {
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+ big_endian = 0;
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+ info->chipwidth = FLASH_CFI_BY16;
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+ if(va == vc) info->portwidth = FLASH_CFI_32BIT;
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+ else info->portwidth = FLASH_CFI_16BIT;
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+ }
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+ else if ((va!=0) && (vb!=0)) {
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+ big_endian = 1; /* no meaning for 8bit chip */
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+ info->chipwidth = FLASH_CFI_BY8;
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+ if(va == vb) info->portwidth = FLASH_CFI_16BIT;
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+ else info->portwidth = FLASH_CFI_8BIT;
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+ }
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+#ifdef DEBUG
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+ switch (info->portwidth) {
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+ case FLASH_CFI_8BIT:
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+ printf("port width is 8 bit.\n");
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+ break;
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+ case FLASH_CFI_16BIT:
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+ printf("port width is 16 bit, ");
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+ break;
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+ case FLASH_CFI_32BIT:
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+ printf("port width is 32 bit, ");
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+ break;
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+ }
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+ switch (info->chipwidth) {
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+ case FLASH_CFI_BY16:
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+ printf("chip width is 16 bit, ");
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+ switch (big_endian) {
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+ case 0:
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+ printf("Little Endian.\n");
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+ break;
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+ case 1:
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+ printf("Big Endian.\n");
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+ break;
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+ }
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+ break;
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+ }
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+#endif
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+#endif /*#ifdef CFG_FLASH_CFI*/
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+
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+ if (big_endian==0) value = (addr[0] & 0xFF000000) >>8;
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+ else value = (addr[0] & 0x00FF0000);
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+#ifdef DEBUG
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+ printf("manufacturer=0x%x\n",(uint)(value>>16));
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+#endif
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+ switch (value) {
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+ case MT_MANUFACT & 0xFFFF0000: /* SHARP, MT or => Intel */
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+ case INTEL_ALT_MANU & 0xFFFF0000:
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+ info->flash_id = FLASH_MAN_INTEL;
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+ break;
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+ default:
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+ printf("unknown manufacturer: %x\n", (unsigned int)value);
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+ info->flash_id = FLASH_UNKNOWN;
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+ info->sector_count = 0;
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+ info->size = 0;
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+ return (0); /* no or unknown flash */
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+ }
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+
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+ if (info->portwidth==FLASH_CFI_16BIT) {
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+ switch (big_endian) {
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+ case 0:
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+ value = (addr[0] & 0x0000FF00)>>8;
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+ break;
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+ case 1:
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+ value = (addr[0] & 0x000000FF);
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+ break;
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+ }
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+ }
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+ else if (info->portwidth == FLASH_CFI_32BIT) {
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+ switch (big_endian) {
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+ case 0:
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+ value = (addr[1] & 0x0000FF00)>>8;
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+ break;
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+ case 1:
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+ value = (addr[1] & 0x000000FF);
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+ break;
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+ }
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+ }
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+
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+#ifdef DEBUG
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+ printf("deviceID=0x%x\n",(uint)value);
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+#endif
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+ switch (value) {
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+ case (INTEL_ID_28F016S & 0x0000FFFF):
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+ info->flash_id += FLASH_28F016SV;
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+ info->sector_count = 32;
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+ sector_offset = 0x10000;
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+ break; /* => 2 MB */
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+
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+ case (INTEL_ID_28F160S3 & 0x0000FFFF):
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+ info->flash_id += FLASH_28F160S3;
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+ info->sector_count = 32;
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+ sector_offset = 0x10000;
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+ break; /* => 2 MB */
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+
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+ case (INTEL_ID_28F320S3 & 0x0000FFFF):
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+ info->flash_id += FLASH_28F320S3;
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+ info->sector_count = 64;
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+ sector_offset = 0x10000;
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+ break; /* => 4 MB */
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+
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+ case (INTEL_ID_28F640J3A & 0x0000FFFF):
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+ info->flash_id += FLASH_28F640J3A;
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+ info->sector_count = 64;
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+ sector_offset = 0x20000;
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+ break; /* => 8 MB */
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+
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+ case SHARP_ID_28F016SCL & 0x0000FFFF:
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+ case SHARP_ID_28F016SCZ & 0x0000FFFF:
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+ info->flash_id = FLASH_MAN_SHARP | FLASH_LH28F016SCT;
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+ info->sector_count = 32;
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+ sector_offset = 0x10000;
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+ break; /* => 2 MB */
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+
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+
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+ default:
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+ info->flash_id = FLASH_UNKNOWN;
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+ return (0); /* => no or unknown flash */
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+
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+ }
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+
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+ sector_offset = sector_offset * (info->portwidth / info->chipwidth);
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+ info->size = info->sector_count * sector_offset;
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+
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+ /* set up sector start address table */
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+ for (i = 0; i < info->sector_count; i++) {
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+ info->start[i] = base;
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+ base += sector_offset;
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+ /* don't know how to check sector protection */
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+ info->protect[i] = 0;
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+ }
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+
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+ /*
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+ * Prevent writes to uninitialized FLASH.
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+ */
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+ if (info->flash_id != FLASH_UNKNOWN) {
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+ addr = (vu_long *)info->start[0];
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+ *addr = 0xFFFFFF; /* reset bank to read array mode */
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+ asm("sync");
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+ }
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+
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+ return (info->size);
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+}
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+
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+
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+/*-----------------------------------------------------------------------
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+ */
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+
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+int flash_erase (flash_info_t *info, int s_first, int s_last)
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+{
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+ int flag, prot, sect;
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+ ulong start, now, last, ready, erase_err_status;
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+
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+ if (big_endian == 1) {
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+ ready = 0x0080;
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+ erase_err_status = 0x00a0;
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+ }
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+ else {
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+ ready = 0x8000;
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+ erase_err_status = 0xa000;
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+ }
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+ if ((info->portwidth / info->chipwidth)==2) {
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+ ready += (ready <<16);
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+ erase_err_status += (erase_err_status <<16);
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+ }
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+
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+#ifdef DEBUG
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+ printf ("\nReady flag is 0x%lx\nErase error flag is 0x%lx", ready, erase_err_status);
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+#endif
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+
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+ if ((s_first < 0) || (s_first > s_last)) {
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+ if (info->flash_id == FLASH_UNKNOWN) {
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+ printf ("- missing\n");
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+ } else {
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+ printf ("- no sectors to erase\n");
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+ }
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+ return 1;
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+ }
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+
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+ if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL)
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+ && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) {
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+ printf ("Can't erase unknown flash type %08lx - aborted\n",
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+ info->flash_id);
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+ return 1;
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+ }
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+
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+ prot = 0;
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+ for (sect=s_first; sect<=s_last; ++sect) {
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+ if (info->protect[sect]) {
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+ prot++;
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+ }
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+ }
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+
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+ if (prot) {
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+ printf ("- Warning: %d protected sectors will not be erased!\n",
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+ prot);
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+ } else {
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+ printf ("\n");
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+ }
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+
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+#ifdef DEBUG
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+ printf("\nFlash Erase:\n");
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+#endif
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+ /* Make Sure Block Lock Bit is not set. */
|
|
|
+ if(clear_block_lock_bit(info, (vu_long *)(info->start[s_first]))){
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Start erase on unprotected sectors */
|
|
|
+#if defined(DEBUG)
|
|
|
+ printf("Begin to erase now,s_first=0x%x s_last=0x%x...\n",s_first,s_last);
|
|
|
+#endif
|
|
|
+ for (sect = s_first; sect<=s_last; sect++) {
|
|
|
+ if (info->protect[sect] == 0) { /* not protected */
|
|
|
+ vu_short *addr16 = (vu_short *)(info->start[sect]);
|
|
|
+ vu_long *addr = (vu_long *)(info->start[sect]);
|
|
|
+ printf(".");
|
|
|
+ switch (info->portwidth) {
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ asm("sync");
|
|
|
+ last = start = get_timer (0);
|
|
|
+ /* Disable interrupts which might cause a timeout here */
|
|
|
+ flag = disable_interrupts();
|
|
|
+ /* Reset Array */
|
|
|
+ *addr16 = 0xffff;
|
|
|
+ asm("sync");
|
|
|
+ /* Clear Status Register */
|
|
|
+ *addr16 = 0x5050;
|
|
|
+ asm("sync");
|
|
|
+ /* Single Block Erase Command */
|
|
|
+ *addr16 = 0x2020;
|
|
|
+ asm("sync");
|
|
|
+ /* Confirm */
|
|
|
+ *addr16 = 0xD0D0;
|
|
|
+ asm("sync");
|
|
|
+ if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
|
|
|
+ /* Resume Command, as per errata update */
|
|
|
+ *addr16 = 0xD0D0;
|
|
|
+ asm("sync");
|
|
|
+ }
|
|
|
+ /* re-enable interrupts if necessary */
|
|
|
+ if (flag)
|
|
|
+ enable_interrupts();
|
|
|
+ /* wait at least 80us - let's wait 1 ms */
|
|
|
+ *addr16 = 0x7070;
|
|
|
+ udelay (1000);
|
|
|
+ while ((*addr16 & ready) != ready) {
|
|
|
+ if((*addr16 & erase_err_status)== erase_err_status){
|
|
|
+ printf("Error in Block Erase - Lock Bit may be set!\n");
|
|
|
+ printf("Status Register = 0x%X\n", (uint)*addr16);
|
|
|
+ *addr16 = 0xFFFF; /* reset bank */
|
|
|
+ asm("sync");
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
|
|
|
+ printf ("Timeout\n");
|
|
|
+ *addr16 = 0xFFFF; /* reset bank */
|
|
|
+ asm("sync");
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ /* show that we're waiting */
|
|
|
+ if ((now - last) > 1000) { /* every second */
|
|
|
+ putc ('.');
|
|
|
+ last = now;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ /* reset to read mode */
|
|
|
+ *addr16 = 0xFFFF;
|
|
|
+ asm("sync");
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ asm("sync");
|
|
|
+ last = start = get_timer (0);
|
|
|
+ /* Disable interrupts which might cause a timeout here */
|
|
|
+ flag = disable_interrupts();
|
|
|
+ /* Reset Array */
|
|
|
+ *addr = 0xffffffff;
|
|
|
+ asm("sync");
|
|
|
+ /* Clear Status Register */
|
|
|
+ *addr = 0x50505050;
|
|
|
+ asm("sync");
|
|
|
+ /* Single Block Erase Command */
|
|
|
+ *addr = 0x20202020;
|
|
|
+ asm("sync");
|
|
|
+ /* Confirm */
|
|
|
+ *addr = 0xD0D0D0D0;
|
|
|
+ asm("sync");
|
|
|
+ if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) {
|
|
|
+ /* Resume Command, as per errata update */
|
|
|
+ *addr = 0xD0D0D0D0;
|
|
|
+ asm("sync");
|
|
|
+ }
|
|
|
+ /* re-enable interrupts if necessary */
|
|
|
+ if (flag)
|
|
|
+ enable_interrupts();
|
|
|
+ /* wait at least 80us - let's wait 1 ms */
|
|
|
+ *addr = 0x70707070;
|
|
|
+ udelay (1000);
|
|
|
+ while ((*addr & ready) != ready) {
|
|
|
+ if((*addr & erase_err_status)==erase_err_status){
|
|
|
+ printf("Error in Block Erase - Lock Bit may be set!\n");
|
|
|
+ printf("Status Register = 0x%X\n", (uint)*addr);
|
|
|
+ *addr = 0xFFFFFFFF; /* reset bank */
|
|
|
+ asm("sync");
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
|
|
|
+ printf ("Timeout\n");
|
|
|
+ *addr = 0xFFFFFFFF; /* reset bank */
|
|
|
+ asm("sync");
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ /* show that we're waiting */
|
|
|
+ if ((now - last) > 1000) { /* every second */
|
|
|
+ putc ('.');
|
|
|
+ last = now;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ /* reset to read mode */
|
|
|
+ *addr = 0xFFFFFFFF;
|
|
|
+ asm("sync");
|
|
|
+ break;
|
|
|
+ } /* end switch */
|
|
|
+ } /* end if */
|
|
|
+ } /* end for */
|
|
|
+
|
|
|
+ printf ("flash erase done\n");
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * Copy memory to flash, returns:
|
|
|
+ * 0 - OK
|
|
|
+ * 1 - write timeout
|
|
|
+ * 2 - Flash not erased
|
|
|
+ */
|
|
|
+
|
|
|
+#define FLASH_BLOCK_SIZE 32
|
|
|
+
|
|
|
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
|
|
|
+{
|
|
|
+ ulong cp, wp, data, count, temp;
|
|
|
+/* ulong temp[FLASH_BLOCK_SIZE/4];*/
|
|
|
+ int i, l, rc;
|
|
|
+
|
|
|
+ count = cnt;
|
|
|
+ wp = (addr & ~3); /* get lower word aligned address */
|
|
|
+
|
|
|
+ /*
|
|
|
+ * handle unaligned start bytes
|
|
|
+ */
|
|
|
+ if ((l = addr - wp) != 0) {
|
|
|
+ data = 0;
|
|
|
+ for (i=0, cp=wp; i<l; ++i, ++cp) {
|
|
|
+ data = (data << 8) | (*(uchar *)cp);
|
|
|
+ }
|
|
|
+ for (; i<4 && cnt>0; ++i) {
|
|
|
+ data = (data << 8) | *src++;
|
|
|
+ --cnt;
|
|
|
+ ++cp;
|
|
|
+ }
|
|
|
+ for (; cnt==0 && i<4; ++i, ++cp) {
|
|
|
+ data = (data << 8) | (*(uchar *)cp);
|
|
|
+ }
|
|
|
+
|
|
|
+ if ((rc = write_word(info, wp, data)) != 0) {
|
|
|
+ return (rc);
|
|
|
+ }
|
|
|
+ wp += 4;
|
|
|
+ }
|
|
|
+
|
|
|
+ cp = wp;
|
|
|
+ /* handle unaligned block bytes , flash block size = 16bytes */
|
|
|
+ wp = (cp+FLASH_BLOCK_SIZE-1) & ~(FLASH_BLOCK_SIZE-1);
|
|
|
+ if ((wp-cp)>=cnt) {
|
|
|
+ if ((rc = write_block(info,src,cp,wp-cp)) !=0)
|
|
|
+ return (rc);
|
|
|
+ src += wp-cp;
|
|
|
+ cnt -= wp-cp;
|
|
|
+ }
|
|
|
+ /* handle aligned block bytes */
|
|
|
+ temp = 0;
|
|
|
+ printf("\n");
|
|
|
+ while ( cnt >= FLASH_BLOCK_SIZE) {
|
|
|
+ if ((rc = write_block(info,src,cp,FLASH_BLOCK_SIZE)) !=0) {
|
|
|
+ return (rc);
|
|
|
+ }
|
|
|
+ src += FLASH_BLOCK_SIZE;
|
|
|
+ cp += FLASH_BLOCK_SIZE;
|
|
|
+ cnt -= FLASH_BLOCK_SIZE;
|
|
|
+ if (((count-cnt)>>10)>temp) {
|
|
|
+ temp=(count-cnt)>>10;
|
|
|
+ printf("\r%d KB",temp);
|
|
|
+ }
|
|
|
+ }
|
|
|
+ printf("\n");
|
|
|
+ wp = cp;
|
|
|
+ /*
|
|
|
+ * handle word aligned part
|
|
|
+ */
|
|
|
+ while (cnt >= 4) {
|
|
|
+ data = 0;
|
|
|
+ for (i=0; i<4; ++i) {
|
|
|
+ data = (data << 8) | *src++;
|
|
|
+ }
|
|
|
+ if ((rc = write_word(info, wp, data)) != 0) {
|
|
|
+ return (rc);
|
|
|
+ }
|
|
|
+ wp += 4;
|
|
|
+ cnt -= 4;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (cnt == 0) {
|
|
|
+ return (0);
|
|
|
+ }
|
|
|
+
|
|
|
+ /*
|
|
|
+ * handle unaligned tail bytes
|
|
|
+ */
|
|
|
+ data = 0;
|
|
|
+ for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
|
|
|
+ data = (data << 8) | *src++;
|
|
|
+ --cnt;
|
|
|
+ }
|
|
|
+ for (; i<4; ++i, ++cp) {
|
|
|
+ data = (data << 8) | (*(uchar *)cp);
|
|
|
+ }
|
|
|
+
|
|
|
+ return (write_word(info, wp, data));
|
|
|
+}
|
|
|
+#undef FLASH_BLOCK_SIZE
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * Write block to Flash, returns:
|
|
|
+ * 0 - OK
|
|
|
+ * 1 - write timeout
|
|
|
+ * 2 - Flash not erased
|
|
|
+ * -1 Error
|
|
|
+ */
|
|
|
+static int write_block(flash_info_t *info, uchar * src, ulong dest, ulong cnt)
|
|
|
+{
|
|
|
+ vu_short *baddr, *addr = (vu_short *)dest;
|
|
|
+ ushort data;
|
|
|
+ ulong start, now, xsr,csr, ready;
|
|
|
+ int flag;
|
|
|
+
|
|
|
+ if (cnt==0) return 0;
|
|
|
+ else if(cnt != (cnt& ~1)) return -1;
|
|
|
+
|
|
|
+ /* Check if Flash is (sufficiently) erased */
|
|
|
+ data = * src;
|
|
|
+ data = (data<<8) | *(src+1);
|
|
|
+ if ((*addr & data) != data) {
|
|
|
+ return (2);
|
|
|
+ }
|
|
|
+ if (big_endian == 1) {
|
|
|
+ ready = 0x0080;
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ ready = 0x8000;
|
|
|
+ }
|
|
|
+ /* Disable interrupts which might cause a timeout here */
|
|
|
+ flag = disable_interrupts();
|
|
|
+
|
|
|
+ do {
|
|
|
+ /* Write Command */
|
|
|
+ *addr = 0xe8e8;
|
|
|
+ asm("sync");
|
|
|
+ xsr = *addr;
|
|
|
+ asm("sync");
|
|
|
+ } while (!(xsr & ready)); /*wait until read */
|
|
|
+ /*write count=BLOCK SIZE -1 */
|
|
|
+ data=(cnt>>1)-1;
|
|
|
+ data=(data<<8)|data;
|
|
|
+ *addr = data; /* word mode, cnt/2 */
|
|
|
+ asm("sync");
|
|
|
+ baddr = addr;
|
|
|
+ while(cnt) {
|
|
|
+ data = * src++;
|
|
|
+ data = (data<<8) | *src++;
|
|
|
+ asm("sync");
|
|
|
+ *baddr = data;
|
|
|
+ asm("sync");
|
|
|
+ ++baddr;
|
|
|
+ cnt = cnt -2;
|
|
|
+ }
|
|
|
+ *addr = 0xd0d0; /* confirm write */
|
|
|
+ start = get_timer(0);
|
|
|
+ asm("sync");
|
|
|
+ if (flag)
|
|
|
+ enable_interrupts();
|
|
|
+ /* data polling for D7 */
|
|
|
+ flag = 0;
|
|
|
+ while (((csr = *addr) & ready) != ready) {
|
|
|
+ if ((now=get_timer(start)) > CFG_FLASH_WRITE_TOUT) {
|
|
|
+ flag = 1;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ if (csr & 0x4040) {
|
|
|
+ printf ("CSR indicates write error (%04x) at %08lx\n", csr, (ulong)addr);
|
|
|
+ flag = 1;
|
|
|
+ }
|
|
|
+ /* Clear Status Registers Command */
|
|
|
+ *addr = 0x5050;
|
|
|
+ asm("sync");
|
|
|
+ /* Reset to read array mode */
|
|
|
+ *addr = 0xFFFF;
|
|
|
+ asm("sync");
|
|
|
+ return (flag);
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * Write a short word to Flash, returns:
|
|
|
+ * 0 - OK
|
|
|
+ * 1 - write timeout
|
|
|
+ * 2 - Flash not erased
|
|
|
+ */
|
|
|
+static int write_short (flash_info_t *info, ulong dest, ushort data)
|
|
|
+{
|
|
|
+ vu_short *addr = (vu_short *)dest;
|
|
|
+ ulong start, now, csr, ready;
|
|
|
+ int flag;
|
|
|
+
|
|
|
+ /* Check if Flash is (sufficiently) erased */
|
|
|
+ if ((*addr & data) != data) {
|
|
|
+ return (2);
|
|
|
+ }
|
|
|
+ /* Disable interrupts which might cause a timeout here */
|
|
|
+ flag = disable_interrupts();
|
|
|
+
|
|
|
+ /* Write Command */
|
|
|
+ *addr = 0x1010;
|
|
|
+ start = get_timer (0);
|
|
|
+ asm("sync");
|
|
|
+ /* Write Data */
|
|
|
+ *addr = data;
|
|
|
+ asm("sync");
|
|
|
+ /* re-enable interrupts if necessary */
|
|
|
+ if (flag)
|
|
|
+ enable_interrupts();
|
|
|
+ if (big_endian == 1) {
|
|
|
+ ready = 0x0080;
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ ready = 0x8000;
|
|
|
+ }
|
|
|
+ /* data polling for D7 */
|
|
|
+ flag = 0;
|
|
|
+ while (((csr = *addr) & ready) != ready) {
|
|
|
+ if ((now=get_timer(start)) > CFG_FLASH_WRITE_TOUT) {
|
|
|
+ flag = 1;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ if (csr & 0x4040) {
|
|
|
+ printf ("CSR indicates write error (%04x) at %08lx\n", csr, (ulong)addr);
|
|
|
+ flag = 1;
|
|
|
+ }
|
|
|
+ /* Clear Status Registers Command */
|
|
|
+ *addr = 0x5050;
|
|
|
+ asm("sync");
|
|
|
+ /* Reset to read array mode */
|
|
|
+ *addr = 0xFFFF;
|
|
|
+ asm("sync");
|
|
|
+ return (flag);
|
|
|
+}
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * Write a word to Flash, returns:
|
|
|
+ * 0 - OK
|
|
|
+ * 1 - write timeout
|
|
|
+ * 2 - Flash not erased
|
|
|
+ */
|
|
|
+static int write_word (flash_info_t *info, ulong dest, ulong data)
|
|
|
+{
|
|
|
+ vu_long *addr = (vu_long *)dest;
|
|
|
+ ulong start, csr, ready;
|
|
|
+ int flag=0;
|
|
|
+
|
|
|
+ switch (info->portwidth) {
|
|
|
+ case FLASH_CFI_32BIT:
|
|
|
+ /* Check if Flash is (sufficiently) erased */
|
|
|
+ if ((*addr & data) != data) {
|
|
|
+ return (2);
|
|
|
+ }
|
|
|
+ /* Disable interrupts which might cause a timeout here */
|
|
|
+ flag = disable_interrupts();
|
|
|
+
|
|
|
+ if (big_endian == 1) {
|
|
|
+ ready = 0x0080;
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ ready = 0x8000;
|
|
|
+ }
|
|
|
+ if ((info->portwidth / info->chipwidth)==2) {
|
|
|
+ ready += (ready <<16);
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ ready = ready << 16;
|
|
|
+ }
|
|
|
+ /* Write Command */
|
|
|
+ *addr = 0x10101010;
|
|
|
+ asm("sync");
|
|
|
+ /* Write Data */
|
|
|
+ *addr = data;
|
|
|
+ /* re-enable interrupts if necessary */
|
|
|
+ if (flag)
|
|
|
+ enable_interrupts();
|
|
|
+ /* data polling for D7 */
|
|
|
+ start = get_timer (0);
|
|
|
+ flag = 0;
|
|
|
+ while (((csr = *addr) & ready) != ready) {
|
|
|
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
|
|
|
+ flag = 1;
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ if (csr & 0x40404040) {
|
|
|
+ printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr);
|
|
|
+ flag = 1;
|
|
|
+ }
|
|
|
+ /* Clear Status Registers Command */
|
|
|
+ *addr = 0x50505050;
|
|
|
+ asm("sync");
|
|
|
+ /* Reset to read array mode */
|
|
|
+ *addr = 0xFFFFFFFF;
|
|
|
+ asm("sync");
|
|
|
+ break;
|
|
|
+ case FLASH_CFI_16BIT:
|
|
|
+ flag = write_short (info, dest, (unsigned short) (data>>16));
|
|
|
+ if (flag == 0)
|
|
|
+ flag = write_short (info, dest+2, (unsigned short) (data));
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ return (flag);
|
|
|
+}
|
|
|
+
|
|
|
+/*-----------------------------------------------------------------------
|
|
|
+ * Clear Block Lock Bit, returns:
|
|
|
+ * 0 - OK
|
|
|
+ * 1 - Timeout
|
|
|
+ */
|
|
|
+
|
|
|
+static int clear_block_lock_bit(flash_info_t * info, vu_long * addr)
|
|
|
+{
|
|
|
+ ulong start, now, ready;
|
|
|
+
|
|
|
+ /* Reset Array */
|
|
|
+ *addr = 0xffffffff;
|
|
|
+ asm("sync");
|
|
|
+ /* Clear Status Register */
|
|
|
+ *addr = 0x50505050;
|
|
|
+ asm("sync");
|
|
|
+
|
|
|
+ *addr = 0x60606060;
|
|
|
+ asm("sync");
|
|
|
+ *addr = 0xd0d0d0d0;
|
|
|
+ asm("sync");
|
|
|
+
|
|
|
+
|
|
|
+ if (big_endian == 1) {
|
|
|
+ ready = 0x0080;
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ ready = 0x8000;
|
|
|
+ }
|
|
|
+ if ((info->portwidth / info->chipwidth)==2) {
|
|
|
+ ready += (ready <<16);
|
|
|
+ }
|
|
|
+ else {
|
|
|
+ ready = ready << 16;
|
|
|
+ }
|
|
|
+#ifdef DEBUG
|
|
|
+ printf ("%s: Ready flag is 0x%8lx\n", __FUNCTION__, ready);
|
|
|
+#endif
|
|
|
+ *addr = 0x70707070; /* read status */
|
|
|
+ start = get_timer (0);
|
|
|
+ while((*addr & ready) != ready){
|
|
|
+ if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
|
|
|
+ printf ("Timeout on clearing Block Lock Bit\n");
|
|
|
+ *addr = 0xFFFFFFFF; /* reset bank */
|
|
|
+ asm("sync");
|
|
|
+ return 1;
|
|
|
+ }
|
|
|
+ }
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+#endif /* !CFG_NO_FLASH */
|
Lunsheng Wang