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@@ -188,13 +188,47 @@ int arch_cpu_init(void)
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}
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}
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#if defined(CONFIG_DISPLAY_CPUINFO)
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#if defined(CONFIG_DISPLAY_CPUINFO)
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+static const char *get_cpu_type(void)
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+{
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+ struct mx28_digctl_regs *digctl_regs =
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+ (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
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+
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+ switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
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+ case HW_DIGCTL_CHIPID_MX28:
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+ return "28";
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+ default:
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+ return "??";
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+ }
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+}
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+
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+static const char *get_cpu_rev(void)
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+{
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+ struct mx28_digctl_regs *digctl_regs =
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+ (struct mx28_digctl_regs *)MXS_DIGCTL_BASE;
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+ uint8_t rev = readl(&digctl_regs->hw_digctl_chipid) & 0x000000FF;
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+
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+ switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
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+ case HW_DIGCTL_CHIPID_MX28:
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+ switch (rev) {
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+ case 0x1:
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+ return "1.2";
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+ default:
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+ return "??";
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+ }
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+ default:
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+ return "??";
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+ }
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+}
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+
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int print_cpuinfo(void)
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int print_cpuinfo(void)
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{
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{
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struct mx28_spl_data *data = (struct mx28_spl_data *)
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struct mx28_spl_data *data = (struct mx28_spl_data *)
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((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf);
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((CONFIG_SYS_TEXT_BASE - sizeof(struct mx28_spl_data)) & ~0xf);
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- printf("Freescale i.MX28 family at %d MHz\n",
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- mxc_get_clock(MXC_ARM_CLK) / 1000000);
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+ printf("CPU: Freescale i.MX%s rev%s at %d MHz\n",
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+ get_cpu_type(),
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+ get_cpu_rev(),
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+ mxc_get_clock(MXC_ARM_CLK) / 1000000);
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printf("BOOT: %s\n", mx28_boot_modes[data->boot_mode_idx].mode);
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printf("BOOT: %s\n", mx28_boot_modes[data->boot_mode_idx].mode);
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return 0;
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return 0;
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}
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}
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