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85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards

Introduce a new define to seperate out the virtual address that PCI
IO space is at from the physical address.  In most situations these are
mapped 1:1.  However any code accessing the bus should use VIRT.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Kumar Gala 16 years ago
parent
5af0fdd81c
commit
aca5f018a8
11 changed files with 30 additions and 8 deletions
Split View Show Diff Stats
  1. 1 1
      board/freescale/mpc8536ds/tlb.c
  2. 1 1
      board/freescale/mpc8572ds/tlb.c
  3. 7 3
      include/configs/MPC8536DS.h
  4. 1 0
      include/configs/MPC8540ADS.h
  5. 2 0
      include/configs/MPC8541CDS.h
  6. 6 2
      include/configs/MPC8544DS.h
  7. 3 0
      include/configs/MPC8548CDS.h
  8. 2 0
      include/configs/MPC8555CDS.h
  9. 1 0
      include/configs/MPC8560ADS.h
  10. 2 0
      include/configs/MPC8568MDS.h
  11. 4 1
      include/configs/MPC8572DS.h

+ 1 - 1
board/freescale/mpc8536ds/tlb.c
View File 

@@ -63,7 +63,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 
 		      0, 2, BOOKE_PAGESZ_1G, 1),
 
 
 	/* *I*G* - PCI I/O */
 
-	SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_PHYS, CONFIG_SYS_PCI1_IO_PHYS,
 
+	SET_TLB_ENTRY(1, CONFIG_SYS_PCI1_IO_VIRT, CONFIG_SYS_PCI1_IO_PHYS,
 
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 
 		      0, 3, BOOKE_PAGESZ_256K, 1),

+ 1 - 1
board/freescale/mpc8572ds/tlb.c
View File 

@@ -73,7 +73,7 @@ struct fsl_e_tlb_entry tlb_table[] = {
 
 		      0, 5, BOOKE_PAGESZ_256M, 1),
 
 
 	/* *I*G* - PCI I/O */
 
-	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_IO_PHYS, CONFIG_SYS_PCIE3_IO_PHYS,
 
+	SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_IO_VIRT, CONFIG_SYS_PCIE3_IO_PHYS,
 
 		      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
 
 		      0, 6, BOOKE_PAGESZ_256K, 1),

+ 7 - 3
include/configs/MPC8536DS.h
View File 

@@ -361,6 +361,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCI1_MEM_BUS		0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x10000000	/* 256M */
 
+#define CONFIG_SYS_PCI1_IO_VIRT	0xffc00000
 
 #define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI1_IO_PHYS	0xffc00000
 
 #define CONFIG_SYS_PCI1_IO_SIZE	0x00010000	/* 64k */
 
@@ -370,6 +371,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE1_MEM_BUS	0x90000000
 
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0x90000000
 
 #define CONFIG_SYS_PCIE1_MEM_SIZE	0x08000000	/* 128M */
 
+#define CONFIG_SYS_PCIE1_IO_VIRT	0xffc10000
 
 #define CONFIG_SYS_PCIE1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE1_IO_PHYS	0xffc10000
 
 #define CONFIG_SYS_PCIE1_IO_SIZE	0x00010000	/* 64k */
 
@@ -379,6 +381,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE2_MEM_BUS	0x98000000
 
 #define CONFIG_SYS_PCIE2_MEM_PHYS	0x98000000
 
 #define CONFIG_SYS_PCIE2_MEM_SIZE	0x08000000	/* 128M */
 
+#define CONFIG_SYS_PCIE2_IO_VIRT	0xffc20000
 
 #define CONFIG_SYS_PCIE2_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE2_IO_PHYS	0xffc20000
 
 #define CONFIG_SYS_PCIE2_IO_SIZE	0x00010000	/* 64k */
 
@@ -388,6 +391,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE3_MEM_BUS	0xa0000000
 
 #define CONFIG_SYS_PCIE3_MEM_PHYS	0xa0000000
 
 #define CONFIG_SYS_PCIE3_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCIE3_IO_VIRT	0xffc30000
 
 #define CONFIG_SYS_PCIE3_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE3_IO_PHYS	0xffc30000
 
 #define CONFIG_SYS_PCIE3_IO_SIZE	0x00010000	/* 64k */
 
@@ -398,10 +402,10 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_PCI_PNP			/* do pci plug-and-play */
 
 
 /*PCIE video card used*/
 
-#define VIDEO_IO_OFFSET		CONFIG_SYS_PCIE3_IO_PHYS
 
+#define VIDEO_IO_OFFSET		CONFIG_SYS_PCIE3_IO_VIRT
 
 
 /*PCI video card used*/
 
-/*#define VIDEO_IO_OFFSET	CONFIG_SYS_PCI1_IO_PHYS*/
 
+/*#define VIDEO_IO_OFFSET	CONFIG_SYS_PCI1_IO_VIRT*/
 
 
 /* video */
 
 #define CONFIG_VIDEO
 
@@ -414,7 +418,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_ATI_RADEON_FB
 
 #define CONFIG_VIDEO_LOGO
 
 /*#define CONFIG_CONSOLE_CURSOR*/
 
-#define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCIE3_IO_PHYS
 
+#define CONFIG_SYS_ISA_IO_BASE_ADDRESS CONFIG_SYS_PCIE3_IO_VIRT
 
 #endif
 
 
 #undef CONFIG_EEPRO100

+ 1 - 0
include/configs/MPC8540ADS.h
View File 

@@ -321,6 +321,7 @@
 
 #define CONFIG_SYS_PCI1_MEM_BUS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI1_IO_VIRT	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI1_IO_PHYS	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_SIZE	0x100000	/* 1M */

+ 2 - 0
include/configs/MPC8541CDS.h
View File 

@@ -345,6 +345,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCI1_MEM_BUS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI1_IO_VIRT	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI1_IO_PHYS	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_SIZE	0x100000	/* 1M */
 
@@ -353,6 +354,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCI2_MEM_BUS	0xa0000000
 
 #define CONFIG_SYS_PCI2_MEM_PHYS	0xa0000000
 
 #define CONFIG_SYS_PCI2_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI2_IO_VIRT	0xe2100000
 
 #define CONFIG_SYS_PCI2_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI2_IO_PHYS	0xe2100000
 
 #define CONFIG_SYS_PCI2_IO_SIZE	0x100000	/* 1M */

+ 6 - 2
include/configs/MPC8544DS.h
View File 

@@ -272,6 +272,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCI1_MEM_BUS	0xc0000000
 
 #define CONFIG_SYS_PCI1_MEM_PHYS	0xc0000000
 
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI1_IO_VIRT	0xe1000000
 
 #define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI1_IO_PHYS	0xe1000000
 
 #define CONFIG_SYS_PCI1_IO_SIZE	0x00010000	/* 64k */
 
@@ -281,6 +282,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE2_MEM_BUS	0x80000000
 
 #define CONFIG_SYS_PCIE2_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCIE2_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCIE2_IO_VIRT	0xe1010000
 
 #define CONFIG_SYS_PCIE2_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE2_IO_PHYS	0xe1010000
 
 #define CONFIG_SYS_PCIE2_IO_SIZE	0x00010000	/* 64k */
 
@@ -290,6 +292,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE1_MEM_BUS	0xa0000000
 
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0xa0000000
 
 #define CONFIG_SYS_PCIE1_MEM_SIZE	0x10000000	/* 256M */
 
+#define CONFIG_SYS_PCIE1_IO_VIRT	0xe1020000
 
 #define CONFIG_SYS_PCIE1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE1_IO_PHYS	0xe1020000
 
 #define CONFIG_SYS_PCIE1_IO_SIZE	0x00010000	/* 64k */
 
@@ -299,6 +302,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE3_MEM_BUS	0xb0000000
 
 #define CONFIG_SYS_PCIE3_MEM_PHYS	0xb0000000
 
 #define CONFIG_SYS_PCIE3_MEM_SIZE	0x00100000	/* 1M */
 
+#define CONFIG_SYS_PCIE3_IO_VIRT	0xb0100000	/* reuse mem LAW */
 
 #define CONFIG_SYS_PCIE3_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE3_IO_PHYS	0xb0100000	/* reuse mem LAW */
 
 #define CONFIG_SYS_PCIE3_IO_SIZE	0x00100000	/* 1M */
 
@@ -310,10 +314,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #if defined(CONFIG_PCI)
 
 
 /*PCIE video card used*/
 
-#define VIDEO_IO_OFFSET		CONFIG_SYS_PCIE2_IO_PHYS
 
+#define VIDEO_IO_OFFSET		CONFIG_SYS_PCIE2_IO_VIRT
 
 
 /*PCI video card used*/
 
-/*#define VIDEO_IO_OFFSET	CONFIG_SYS_PCI1_IO_PHYS*/
 
+/*#define VIDEO_IO_OFFSET	CONFIG_SYS_PCI1_IO_VIRT*/
 
 
 /* video */
 
 #define CONFIG_VIDEO

+ 3 - 0
include/configs/MPC8548CDS.h
View File 

@@ -372,6 +372,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCI1_MEM_BUS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI1_IO_VIRT	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI1_IO_PHYS	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_SIZE	0x00100000	/* 1M */
 
@@ -381,6 +382,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCI2_MEM_BUS	0xa0000000
 
 #define CONFIG_SYS_PCI2_MEM_PHYS	0xa0000000
 
 #define CONFIG_SYS_PCI2_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI2_IO_VIRT	0xe2800000
 
 #define CONFIG_SYS_PCI2_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI2_IO_PHYS	0xe2800000
 
 #define CONFIG_SYS_PCI2_IO_SIZE	0x00100000	/* 1M */
 
@@ -391,6 +393,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCIE1_MEM_BUS	0xa0000000
 
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0xa0000000
 
 #define CONFIG_SYS_PCIE1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCIE1_IO_VIRT	0xe3000000
 
 #define CONFIG_SYS_PCIE1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE1_IO_PHYS	0xe3000000
 
 #define CONFIG_SYS_PCIE1_IO_SIZE	0x00100000	/*   1M */

+ 2 - 0
include/configs/MPC8555CDS.h
View File 

@@ -343,6 +343,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCI1_MEM_BUS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI1_IO_VIRT	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI1_IO_PHYS	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_SIZE	0x00100000	/* 1M */
 
@@ -351,6 +352,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCI2_MEM_BUS	0xa0000000
 
 #define CONFIG_SYS_PCI2_MEM_PHYS	0xa0000000
 
 #define CONFIG_SYS_PCI2_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI2_IO_VIRT	0xe2100000
 
 #define CONFIG_SYS_PCI2_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI2_IO_PHYS	0xe2100000
 
 #define CONFIG_SYS_PCI2_IO_SIZE	0x00100000	/* 1M */

+ 1 - 0
include/configs/MPC8560ADS.h
View File 

@@ -313,6 +313,7 @@
 
 #define CONFIG_SYS_PCI1_MEM_BUS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI1_IO_VIRT	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI1_IO_PHYS	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_SIZE	0x100000	/* 1M */

+ 2 - 0
include/configs/MPC8568MDS.h
View File 

@@ -326,6 +326,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCI1_MEM_BUS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCI1_IO_VIRT	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCI1_IO_PHYS	0xe2000000
 
 #define CONFIG_SYS_PCI1_IO_SIZE	0x00800000	/* 8M */
 
@@ -334,6 +335,7 @@ extern unsigned long get_clock_freq(void);
 
 #define CONFIG_SYS_PCIE1_MEM_BUS	0xa0000000
 
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0xa0000000
 
 #define CONFIG_SYS_PCIE1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCIE1_IO_VIRT	0xe2800000
 
 #define CONFIG_SYS_PCIE1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE1_IO_PHYS	0xe2800000
 
 #define CONFIG_SYS_PCIE1_IO_SIZE	0x00800000	/* 8M */

+ 4 - 1
include/configs/MPC8572DS.h
View File 

@@ -384,6 +384,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE3_MEM_BUS	0x80000000
 
 #define CONFIG_SYS_PCIE3_MEM_PHYS	0x80000000
 
 #define CONFIG_SYS_PCIE3_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCIE3_IO_VIRT	0xffc00000
 
 #define CONFIG_SYS_PCIE3_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE3_IO_PHYS	0xffc00000
 
 #define CONFIG_SYS_PCIE3_IO_SIZE	0x00010000	/* 64k */
 
@@ -393,6 +394,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE2_MEM_BUS	0xa0000000
 
 #define CONFIG_SYS_PCIE2_MEM_PHYS	0xa0000000
 
 #define CONFIG_SYS_PCIE2_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCIE2_IO_VIRT	0xffc10000
 
 #define CONFIG_SYS_PCIE2_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE2_IO_PHYS	0xffc10000
 
 #define CONFIG_SYS_PCIE2_IO_SIZE	0x00010000	/* 64k */
 
@@ -402,6 +404,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #define CONFIG_SYS_PCIE1_MEM_BUS	0xc0000000
 
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0xc0000000
 
 #define CONFIG_SYS_PCIE1_MEM_SIZE	0x20000000	/* 512M */
 
+#define CONFIG_SYS_PCIE1_IO_VIRT	0xffc20000
 
 #define CONFIG_SYS_PCIE1_IO_BUS	0x00000000
 
 #define CONFIG_SYS_PCIE1_IO_PHYS	0xffc20000
 
 #define CONFIG_SYS_PCIE1_IO_SIZE	0x00010000	/* 64k */
 
@@ -409,7 +412,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 
 #if defined(CONFIG_PCI)
 
 
 /*PCIE video card used*/
 
-#define VIDEO_IO_OFFSET		CONFIG_SYS_PCIE1_IO_PHYS
 
+#define VIDEO_IO_OFFSET		CONFIG_SYS_PCIE1_IO_VIRT
 
 
 /* video */
 
 #define CONFIG_VIDEO