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@@ -31,7 +31,7 @@
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#include "mx28_init.h"
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-uint32_t dram_vals[] = {
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+static uint32_t mx28_dram_vals[] = {
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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0x00000000, 0x00000000, 0x00000000, 0x00000000,
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@@ -88,14 +88,14 @@ void __mx28_adjust_memory_params(uint32_t *dram_vals)
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void mx28_adjust_memory_params(uint32_t *dram_vals)
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__attribute__((weak, alias("__mx28_adjust_memory_params")));
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-void init_m28_200mhz_ddr2(void)
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+void init_mx28_200mhz_ddr2(void)
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{
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int i;
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- mx28_adjust_memory_params(dram_vals);
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+ mx28_adjust_memory_params(mx28_dram_vals);
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- for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
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- writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
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+ for (i = 0; i < ARRAY_SIZE(mx28_dram_vals); i++)
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+ writel(mx28_dram_vals[i], MXS_DRAM_BASE + (4 * i));
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}
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void mx28_mem_init_clock(void)
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@@ -230,7 +230,7 @@ void mx28_mem_init(void)
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/* Clear START bit from DRAM_CTL16 */
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clrbits_le32(MXS_DRAM_BASE + 0x40, 1);
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- init_m28_200mhz_ddr2();
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+ init_mx28_200mhz_ddr2();
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/* Clear SREFRESH bit from DRAM_CTL17 */
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clrbits_le32(MXS_DRAM_BASE + 0x44, 1);
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