ColdFire: MCF5329 Update and cleanup

Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>

Makefile

@@ -1682,7 +1682,7 @@ M5329BFEE_config :	unconfig
 	esac; \
 	>include/config.h ; \
 	if [ "$${NAND}" != "0" ] ; then \
-		echo "#define NANDFLASH_SIZE	$${NAND}" >> include/config.h ; \
+		echo "#define NANDFLASH_SIZE	$${NAND}" > $(obj)include/config.h ; \
 	fi
 	@$(MKCONFIG) -a M5329EVB m68k mcf532x m5329evb freescale
 

board/freescale/m5329evb/mii.c

@@ -30,7 +30,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
 #undef MII_DEBUG
 #undef ET_DEBUG
 
@@ -50,7 +50,7 @@ int fecpin_setclear(struct eth_device *dev, int setclear)
 	return 0;
 }
 
-#if defined(CFG_DISCOVER_PHY) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
 #include <miiphy.h>
 
 /* Make MII read/write commands for the FEC. */
@@ -134,7 +134,7 @@ uint mii_send(uint mii_cmd)
 
 	return (mii_reply & 0xffff);	/* data read from phy */
 }
-#endif				/* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CFG_CMD_MII) */
+#endif				/* CFG_DISCOVER_PHY || CONFIG_CMD_MII */
 
 #if defined(CFG_DISCOVER_PHY)
 int mii_discover_phy(struct eth_device *dev)
@@ -303,4 +303,4 @@ int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
 	return 0;
 }
 
-#endif				/* CFG_CMD_NET, FEC_ENET & NET_MULTI */
+#endif				/* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */

board/freescale/m5329evb/nand.c

@@ -31,7 +31,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
 #include <nand.h>
 #include <linux/mtd/mtd.h>
 

common/cmd_bdinfo.c

@@ -225,7 +225,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #if defined(CFG_MBAR)
 	print_num ("mbar",	    bd->bi_mbar_base	);
 #endif
-#if defined(CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
 	puts ("ethaddr     =");
 	for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
@@ -239,22 +239,22 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #endif
 
 #if defined(CONFIG_HAS_ETH2)
-       puts ("\neth2addr    =");
-       for (i=0; i<6; ++i) {
+	puts ("\neth2addr    =");
+	for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]);
 	}
 #endif
 
 #if defined(CONFIG_HAS_ETH3)
-       puts ("\neth3addr    =");
-       for (i=0; i<6; ++i) {
+	puts ("\neth3addr    =");
+	for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enet3addr[i]);
 	}
 #endif
 
 	puts ("\nip_addr     = ");
 	print_IPaddr (bd->bi_ip_addr);
-#endif	/* CFG_CMD_NET */
+#endif	/* CONFIG_CMD_NET */
 	printf ("\nbaudrate    = %d bps\n", bd->bi_baudrate);
 
 	return 0;

drivers/net/mcffec.c

@@ -51,7 +51,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
 
 struct fec_info_s fec_info[] = {
 #ifdef CFG_FEC0_IOBASE
@@ -410,7 +410,7 @@ int fec_init(struct eth_device *dev, bd_t * bd)
 
 	fec_reset(dev);
 
-#if (CONFIG_COMMANDS & CFG_CMD_MII) || defined (CONFIG_MII) || \
+#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \
 	defined (CFG_DISCOVER_PHY)
 
 	mii_init();
@@ -420,7 +420,7 @@ int fec_init(struct eth_device *dev, bd_t * bd)
 #ifndef CFG_DISCOVER_PHY
 	setFecDuplexSpeed(fecp, bd, (FECDUPLEX << 16) | FECSPEED);
 #endif				/* ifndef CFG_DISCOVER_PHY */
-#endif				/* CFG_CMD_MII || CONFIG_MII */
+#endif				/* CONFIG_CMD_MII || CONFIG_MII */
 
 	/* We use strictly polling mode only */
 	fecp->eimr = 0;
@@ -568,7 +568,7 @@ int mcffec_initialize(bd_t * bis)
 
 		eth_register(dev);
 
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
 		miiphy_register(dev->name,
 				mcffec_miiphy_read, mcffec_miiphy_write);
 #endif
@@ -580,5 +580,5 @@ int mcffec_initialize(bd_t * bis)
 	return 1;
 }
 
-#endif				/* CFG_CMD_NET, FEC_ENET & NET_MULTI */
+#endif				/* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
 #endif				/* CONFIG_MCFFEC */

include/asm-m68k/immap.h

@@ -38,8 +38,10 @@
 #ifdef CONFIG_MCFTMR
 #define CFG_UDELAY_BASE		(MMAP_DTMR0)
 #define CFG_TMR_BASE		(MMAP_DTMR1)
+#define CFG_TMRPND_REG		(((volatile int0_t *)(CFG_INTR_BASE))->iprh0)
 #define CFG_TMRINTR_NO		(INT0_HI_DTMR1)
 #define CFG_TMRINTR_MASK	(INTC_IPRH_INT33)
+#define CFG_TMRINTR_PEND	(CFG_TMRINTR_MASK)
 #define CFG_TMRINTR_PRI		(6)
 #define CFG_TIMER_PRESCALER	(((gd->bus_clk / 1000000) - 1) << 8)
 #endif

include/asm-m68k/io.h

@@ -28,18 +28,18 @@
 
 #include <asm/byteorder.h>
 
-#define readb(addr) in_8((volatile u8 *)(addr))
-#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
+#define readb(addr)		in_8((volatile u8 *)(addr))
+#define writeb(b,addr)		out_8((volatile u8 *)(addr), (b))
 #if !defined(__BIG_ENDIAN)
-#define readw(addr) (*(volatile u16 *) (addr))
-#define readl(addr) (*(volatile u32 *) (addr))
-#define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
-#define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
+#define readw(addr)		(*(volatile u16 *) (addr))
+#define readl(addr)		(*(volatile u32 *) (addr))
+#define writew(b,addr)		((*(volatile u16 *) (addr)) = (b))
+#define writel(b,addr)		((*(volatile u32 *) (addr)) = (b))
 #else
-#define readw(addr) in_le16((volatile u16 *)(addr))
-#define readl(addr) in_le32((volatile u32 *)(addr))
-#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
-#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
+#define readw(addr)		in_le16((volatile u16 *)(addr))
+#define readl(addr)		in_le32((volatile u32 *)(addr))
+#define writew(b,addr)		out_le16((volatile u16 *)(addr),(b))
+#define writel(b,addr)		out_le32((volatile u32 *)(addr),(b))
 #endif
 
 /*
@@ -48,25 +48,25 @@
  * are arrays of bytes, and byte-swapping is not appropriate in
  * that case.  - paulus
  */
-#define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
-#define outsb(port, buf, ns)    _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
-#define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
-#define outsw(port, buf, ns)    _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
-#define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
-#define outsl(port, buf, nl)    _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
-
-#define inb(port)       in_8((u8 *)((port)+_IO_BASE))
-#define outb(val, port)     out_8((u8 *)((port)+_IO_BASE), (val))
+#define insb(port, buf, ns)	_insb((u8 *)((port)+_IO_BASE), (buf), (ns))
+#define outsb(port, buf, ns)	_outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
+#define insw(port, buf, ns)	_insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
+#define outsw(port, buf, ns)	_outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
+#define insl(port, buf, nl)	_insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
+#define outsl(port, buf, nl)	_outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
+
+#define inb(port)		in_8((u8 *)((port)+_IO_BASE))
+#define outb(val, port)		out_8((u8 *)((port)+_IO_BASE), (val))
 #if !defined(__BIG_ENDIAN)
-#define inw(port)       in_be16((u16 *)((port)+_IO_BASE))
-#define outw(val, port)     out_be16((u16 *)((port)+_IO_BASE), (val))
-#define inl(port)       in_be32((u32 *)((port)+_IO_BASE))
-#define outl(val, port)     out_be32((u32 *)((port)+_IO_BASE), (val))
+#define inw(port)		in_be16((u16 *)((port)+_IO_BASE))
+#define outw(val, port)		out_be16((u16 *)((port)+_IO_BASE), (val))
+#define inl(port)		in_be32((u32 *)((port)+_IO_BASE))
+#define outl(val, port)		out_be32((u32 *)((port)+_IO_BASE), (val))
 #else
-#define inw(port)       in_le16((u16 *)((port)+_IO_BASE))
-#define outw(val, port)     out_le16((u16 *)((port)+_IO_BASE), (val))
-#define inl(port)       in_le32((u32 *)((port)+_IO_BASE))
-#define outl(val, port)     out_le32((u32 *)((port)+_IO_BASE), (val))
+#define inw(port)		in_le16((u16 *)((port)+_IO_BASE))
+#define outw(val, port)		out_le16((u16 *)((port)+_IO_BASE), (val))
+#define inl(port)		in_le32((u32 *)((port)+_IO_BASE))
+#define outl(val, port)		out_le32((u32 *)((port)+_IO_BASE), (val))
 #endif
 
 extern inline void _insb(volatile u8 * port, void *buf, int ns)
@@ -151,10 +151,10 @@ extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
  * Neither do the standard versions now, these are just here
  * for older code.
  */
-#define insw_ns(port, buf, ns)  _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
-#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
-#define insl_ns(port, buf, nl)  _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
-#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
+#define insw_ns(port, buf, ns)	_insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
+#define outsw_ns(port, buf, ns)	_outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
+#define insl_ns(port, buf, nl)	_insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
+#define outsl_ns(port, buf, nl)	_outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
 
 #define IO_SPACE_LIMIT ~0
 

include/asm-m68k/timer.h

@@ -33,12 +33,26 @@
 /****************************************************************************/
 /* DMA Timer module registers */
 typedef struct dtimer_ctrl {
+#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
 	u16 tmr;		/* 0x00 Mode register */
+	u16 res1;		/* 0x02 */
+	u16 trr;		/* 0x04 Reference register */
+	u16 res2;		/* 0x06 */
+	u16 tcr;		/* 0x08 Capture register */
+	u16 res3;		/* 0x0A */
+	u16 tcn;		/* 0x0C Counter register */
+	u16 res4;		/* 0x0E */
+	u8 res6;		/* 0x10 */
+	u8 ter;			/* 0x11 Event register */
+	u16 res7;		/* 0x12 */
+#else
+ 	u16 tmr;		/* 0x00 Mode register */
 	u8 txmr;		/* 0x02 Extended Mode register */
 	u8 ter;			/* 0x03 Event register */
 	u32 trr;		/* 0x04 Reference register */
 	u32 tcr;		/* 0x08 Capture register */
 	u32 tcn;		/* 0x0C Counter register */
+#endif
 } dtmr_t;
 
 /*Programmable Interrupt Timer */

include/configs/M5329EVB.h

@@ -47,25 +47,23 @@
 #undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT	5000	/* timeout in milliseconds, max timeout is 6.71sec */
 
-#define DEFAULT_COMMANDS	( CONFIG_CMD_DFL | \
-				  CFG_CMD_CACHE | \
-				  CFG_CMD_DATE | \
-				  CFG_CMD_ELF | \
-				  CFG_CMD_FLASH | \
-				  CFG_CMD_I2C | \
-				  (CFG_CMD_LOADB | CFG_CMD_LOADS) | \
-				  CFG_CMD_MEMORY | \
-				  CFG_CMD_MISC | \
-				  CFG_CMD_MII | \
-				  CFG_CMD_NET | \
-				  CFG_CMD_PING | \
-				  CFG_CMD_REGINFO \
-				)
+/* Command line configuration */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
 
 #ifdef NANDFLASH_SIZE
-#      define CONFIG_COMMANDS  (DEFAULT_COMMANDS | CFG_CMD_NAND)
-#else
-#      define CONFIG_COMMANDS  (DEFAULT_COMMANDS)
+#      define CONFIG_CMD_NAND
 #endif
 
 #define CFG_UNIFY_CACHE
@@ -108,9 +106,9 @@
 #define CFG_I2C_OFFSET		0x58000
 #define CFG_IMMR		CFG_MBAR
 
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
 #define CONFIG_BOOTDELAY	1	/* autoboot after 5 seconds */
+#define CONFIG_UDP_CHECKSUM
+
 #ifdef CONFIG_MCFFEC
 #	define CONFIG_ETHADDR	00:e0:0c:bc:e5:60
 #	define CONFIG_IPADDR	192.162.1.2
@@ -137,7 +135,7 @@
 #define CFG_PROMPT		"-> "
 #define CFG_LONGHELP		/* undef to save memory */
 
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#ifdef CONFIG_CMD_KGDB
 #	define CFG_CBSIZE	1024	/* Console I/O Buffer Size */
 #else
 #	define CFG_CBSIZE	256	/* Console I/O Buffer Size */
@@ -154,7 +152,7 @@
 
 #define CFG_MBAR		0xFC000000
 
-#define CFG_LATCH_ADDR         (CFG_CS1_BASE + 0x80000)
+#define CFG_LATCH_ADDR		(CFG_CS1_BASE + 0x80000)
 
 /*
  * Low Level Configuration Settings
@@ -168,7 +166,7 @@
 #define CFG_INIT_RAM_END	0x8000	/* End of used area in internal SRAM */
 #define CFG_INIT_RAM_CTRL	0x221
 #define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
-#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_GBL_DATA_OFFSET	((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 0x10)
 #define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -198,7 +196,7 @@
  * have to be in the first 8 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization ??
  */
-#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ		(CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
 
 /*-----------------------------------------------------------------------
  * FLASH organization
@@ -214,20 +212,19 @@
 #endif
 
 #ifdef NANDFLASH_SIZE
-#      define CFG_MAX_NAND_DEVICE      1
-#      define CFG_NAND_BASE            (CFG_CS2_BASE << 16)
-#      define CFG_NAND_SIZE            1
-#      define CFG_NAND_BASE_LIST       { CFG_NAND_BASE }
-#      define NAND_MAX_CHIPS           1
-#      define NAND_ALLOW_ERASE_ALL     1
-#      define CONFIG_JFFS2_NAND        1
-#      define CONFIG_JFFS2_DEV         "nand0"
-#      define CONFIG_JFFS2_PART_SIZE   (CFG_CS2_MASK & ~1)
-#      define CONFIG_JFFS2_PART_OFFSET 0x00000000
+#	define CFG_MAX_NAND_DEVICE	1
+#	define CFG_NAND_BASE		(CFG_CS2_BASE << 16)
+#	define CFG_NAND_SIZE		1
+#	define CFG_NAND_BASE_LIST	{ CFG_NAND_BASE }
+#	define NAND_MAX_CHIPS		1
+#	define NAND_ALLOW_ERASE_ALL	1
+#	define CONFIG_JFFS2_NAND	1
+#	define CONFIG_JFFS2_DEV		"nand0"
+#	define CONFIG_JFFS2_PART_SIZE	(CFG_CS2_MASK & ~1)
+#	define CONFIG_JFFS2_PART_OFFSET	0x00000000
 #endif
 
-#define CFG_FLASH_BASE		0
-#define CFG_FLASH0_BASE		(CFG_CS0_BASE << 16)
+#define CFG_FLASH_BASE		(CFG_CS0_BASE << 16)
 
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
@@ -267,6 +264,4 @@
 #define CFG_CS2_CTRL		0x00001f60
 #endif
 
-#define CONFIG_UDP_CHECKSUM
-
 #endif				/* _M5329EVB_H */

lib_m68k/board.c

@@ -692,7 +692,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
 #endif
 #if defined(CONFIG_NET_MULTI)
 	puts ("Net:   ");
-        eth_initialize (bd);
+	eth_initialize (bd);
 #endif
 #endif
 

lib_m68k/time.c

@@ -347,10 +347,9 @@ void udelay(unsigned long usec)
 void dtimer_interrupt(void *not_used)
 {
 	volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE);
-	volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
 
 	/* check for timer interrupt asserted */
-	if ((intp->iprh0 & CFG_TMRINTR_MASK) == CFG_TMRINTR_MASK) {
+	if ((CFG_TMRPND_REG & CFG_TMRINTR_MASK) == CFG_TMRINTR_PEND) {
 		timerp->ter = (DTIM_DTER_CAP | DTIM_DTER_REF);
 		timestamp++;
 		return;

rtc/mcfrtc.c

@@ -28,7 +28,7 @@
 #include <asm/immap.h>
 #include <asm/rtc.h>
 
-#if defined(CONFIG_MCFRTC) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_MCFRTC) && defined(CONFIG_CMD_DATE)
 
 #undef RTC_DEBUG
 
@@ -118,4 +118,4 @@ void rtc_reset(void)
 	rtc->cr |= RTC_CR_SWR;
 }
 
-#endif				/* CONFIG_MCFRTC && CFG_CMD_DATE */
+#endif				/* CONFIG_MCFRTC && CONFIG_CMD_DATE */