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@@ -24,6 +24,19 @@
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* Licensed under the GPL-2 or later.
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*/
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+/* Anomaly notes:
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+ * 05000086 - we don't support autobaud
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+ * 05000099 - we only use DR bit, so losing others is not a problem
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+ * 05000100 - we don't use the UART_IIR register
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+ * 05000215 - we poll the uart (no dma/interrupts)
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+ * 05000225 - no workaround possible, but this shouldnt cause errors ...
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+ * 05000230 - we tweak the baud rate calculation slightly
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+ * 05000231 - we always use 1 stop bit
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+ * 05000309 - we always enable the uart before we modify it in anyway
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+ * 05000350 - we always enable the uart regardless of boot mode
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+ * 05000363 - we don't support break signals, so don't generate one
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+ */
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+
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#include <common.h>
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#include <watchdog.h>
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#include <asm/blackfin.h>
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@@ -43,7 +56,9 @@ uint16_t cached_rbr[256];
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size_t cache_count;
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/* The LSR is read-to-clear on some parts, so we have to make sure status
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- * bits aren't inadvertently lost when doing various tests.
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+ * bits aren't inadvertently lost when doing various tests. This also
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+ * works around anomaly 05000099 at the same time by keeping a cumulative
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+ * tally of all the status bits.
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*/
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static uint16_t uart_lsr_save;
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static uint16_t uart_lsr_read(void)
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@@ -59,6 +74,10 @@ static void uart_lsr_clear(void)
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*pUART_LSR |= -1;
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}
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#else
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+/* When debugging is disabled, we only care about the DR bit, so if other
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+ * bits get set/cleared, we don't really care since we don't read them
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+ * anyways (and thus anomaly 05000099 is irrelevant).
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+ */
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static inline uint16_t uart_lsr_read(void) { return *pUART_LSR; }
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static inline void uart_lsr_clear(void) { *pUART_LSR = -1; }
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#endif
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