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@@ -452,17 +452,16 @@ enum ECSR_STATUS_BIT {
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/* ECSIPR */
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/* ECSIPR */
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enum ECSIPR_STATUS_MASK_BIT {
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enum ECSIPR_STATUS_MASK_BIT {
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-#if defined(CONFIG_CPU_SH7724)
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+#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757)
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+ ECSIPR_BRCRXIP = 0x20,
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ECSIPR_PSRTOIP = 0x10,
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ECSIPR_PSRTOIP = 0x10,
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- ECSIPR_LCHNGIP = 0x04,
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- ECSIPR_ICDIP = 0x01,
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#elif defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
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#elif defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
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ECSIPR_PSRTOIP = 0x10,
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ECSIPR_PSRTOIP = 0x10,
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ECSIPR_PHYIP = 0x08,
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ECSIPR_PHYIP = 0x08,
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+#endif
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ECSIPR_LCHNGIP = 0x04,
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ECSIPR_LCHNGIP = 0x04,
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ECSIPR_MPDIP = 0x02,
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ECSIPR_MPDIP = 0x02,
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ECSIPR_ICDIP = 0x01,
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ECSIPR_ICDIP = 0x01,
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-#endif
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};
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};
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#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
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#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734)
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