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+/*
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+ * (C) Copyright 2001-2003
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+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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+
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+#include <common.h>
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+#include <asm/processor.h>
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+#include <command.h>
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+#include <malloc.h>
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+
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+/* ------------------------------------------------------------------------- */
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+
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+
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+int board_pre_init (void)
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+{
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+ /*
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+ * IRQ 0-15 405GP internally generated; active high; level sensitive
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+ * IRQ 16 405GP internally generated; active low; level sensitive
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+ * IRQ 17-24 RESERVED
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+ * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
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+ * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
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+ * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
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+ * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
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+ * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
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+ * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
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+ * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
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+ */
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+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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+ mtdcr(uicer, 0x00000000); /* disable all ints */
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+ mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
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+ mtdcr(uicpr, 0xFFFFFF9F); /* set int polarities */
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+ mtdcr(uictr, 0x10000000); /* set int trigger levels */
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+ mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
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+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
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+
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+ /*
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+ * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
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+ */
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+ mtebc (epcr, 0xa8400000); /* ebc always driven */
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+
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+ return 0;
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+}
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+
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+
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+/* ------------------------------------------------------------------------- */
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+
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+int misc_init_f (void)
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+{
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+ return 0; /* dummy implementation */
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+}
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+
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+
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+int misc_init_r (void)
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+{
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+ volatile unsigned char *duart0_mcr = (unsigned char *)((ulong)DUART0_BA + 4);
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+ volatile unsigned char *duart1_mcr = (unsigned char *)((ulong)DUART1_BA + 4);
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+ volatile unsigned char *duart2_mcr = (unsigned char *)((ulong)DUART2_BA + 4);
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+ volatile unsigned char *duart3_mcr = (unsigned char *)((ulong)DUART3_BA + 4);
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+
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+ /*
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+ * Reset external DUARTs
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+ */
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+ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
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+ udelay(10); /* wait 10us */
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+ out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
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+ udelay(1000); /* wait 1ms */
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+
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+ /*
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+ * Enable interrupts in exar duart mcr[3]
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+ */
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+ *duart0_mcr = 0x08;
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+ *duart1_mcr = 0x08;
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+ *duart2_mcr = 0x08;
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+ *duart3_mcr = 0x08;
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+
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+ /*
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+ * Set NAND-FLASH GPIO signals to default
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+ */
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+ out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
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+ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
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+
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+ return (0);
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+}
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+
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+
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+/*
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+ * Check Board Identity:
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+ */
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+
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+int checkboard (void)
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+{
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+ unsigned char str[64];
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+ int i = getenv_r ("serial#", str, sizeof(str));
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+
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+ puts ("Board: ");
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+
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+ if (i == -1) {
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+ puts ("### No HW ID - assuming HUB405");
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+ } else {
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+ puts(str);
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+ }
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+
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+ putc ('\n');
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+
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+ return 0;
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+}
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+
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+/* ------------------------------------------------------------------------- */
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+
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+long int initdram (int board_type)
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+{
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+ unsigned long val;
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+
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+ mtdcr(memcfga, mem_mb0cf);
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+ val = mfdcr(memcfgd);
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+
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+#if 0
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+ printf("\nmb0cf=%x\n", val); /* test-only */
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+ printf("strap=%x\n", mfdcr(strap)); /* test-only */
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+#endif
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+
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+ return (4*1024*1024 << ((val & 0x000e0000) >> 17));
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+}
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+
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+/* ------------------------------------------------------------------------- */
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+
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+int testdram (void)
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+{
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+ /* TODO: XXX XXX XXX */
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+ printf ("test: 16 MB - ok\n");
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+
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+ return (0);
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+}
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+
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+/* ------------------------------------------------------------------------- */
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+
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+#if (CONFIG_COMMANDS & CFG_CMD_NAND)
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+#include <linux/mtd/nand.h>
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+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
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+
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+void nand_init(void)
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+{
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+ nand_probe(CFG_NAND_BASE);
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+ if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
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+ print_size(nand_dev_desc[0].totlen, "\n");
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+ }
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+}
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+#endif
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