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@@ -1256,10 +1256,16 @@ typedef struct ccsr_rio {
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typedef struct ccsr_gur {
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uint porpllsr; /* 0xe0000 - POR PLL ratio status register */
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uint porbmsr; /* 0xe0004 - POR boot mode status register */
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-#define MPC86xx_PORBMSR_HA 0x00060000
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+#define MPC8610_PORBMSR_HA 0x00070000
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+#define MPC8610_PORBMSR_HA_SHIFT 16
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+#define MPC8641_PORBMSR_HA 0x00060000
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+#define MPC8641_PORBMSR_HA_SHIFT 17
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uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */
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uint pordevsr; /* 0xe000c - POR I/O device status regsiter */
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-#define MPC86xx_PORDEVSR_IO_SEL 0x000F0000
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+#define MPC8610_PORDEVSR_IO_SEL 0x00380000
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+#define MPC8610_PORDEVSR_IO_SEL_SHIFT 19
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+#define MPC8641_PORDEVSR_IO_SEL 0x000F0000
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+#define MPC8641_PORDEVSR_IO_SEL_SHIFT 16
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#define MPC86xx_PORDEVSR_CORE1TE 0x00000080 /* ASMP (Core1 addr trans) */
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uint pordbgmsr; /* 0xe0010 - POR debug mode status register */
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char res1[12];
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