AVR32: Move addrspace.h to arch-directory, and move some functions from io.h to addrspace.h

The AVR32A architecture (which AT32UC3A-series is based on) has a
different memory layout than the AVR32B-architecture. This patch moves
addrspace.h to an arch-dependent directory in preparation for
AT32UC3A-support. It also moves some address-space manipulation
functions from io.h to addrspace.h.

Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>

include/asm-avr32/addrspace.h → include/asm-avr32/arch-at32ap700x/addrspace.h

@@ -22,6 +22,8 @@
 #ifndef __ASM_AVR32_ADDRSPACE_H
 #define __ASM_AVR32_ADDRSPACE_H
 
+#include <asm/types.h>
+
 /* Memory segments when segmentation is enabled */
 #define P0SEG		0x00000000
 #define P1SEG		0x80000000
@@ -43,4 +45,40 @@
 #define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
 #define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
 
+/* virt_to_phys will only work when address is in P1 or P2 */
+static inline unsigned long virt_to_phys(volatile void *address)
+{
+	return PHYSADDR(address);
+}
+
+static inline void * phys_to_virt(unsigned long address)
+{
+	return (void *)P1SEGADDR(address);
+}
+
+#define cached(addr) ((void *)P1SEGADDR(addr))
+#define uncached(addr) ((void *)P2SEGADDR(addr))
+
+/*
+ * Given a physical address and a length, return a virtual address
+ * that can be used to access the memory range with the caching
+ * properties specified by "flags".
+ *
+ * This implementation works for memory below 512MiB (flash, etc.) as
+ * well as above 3.5GiB (internal peripherals.)
+ */
+#define MAP_NOCACHE	(0)
+#define MAP_WRCOMBINE	(1 << 7)
+#define MAP_WRBACK	(MAP_WRCOMBINE | (1 << 9))
+#define MAP_WRTHROUGH	(MAP_WRBACK | (1 << 0))
+
+static inline void *
+map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
+{
+	if (flags == MAP_WRBACK)
+		return (void *)P1SEGADDR(paddr);
+	else
+		return (void *)P2SEGADDR(paddr);
+}
+
 #endif /* __ASM_AVR32_ADDRSPACE_H */

include/asm-avr32/io.h

@@ -73,21 +73,8 @@ extern void __readwrite_bug(const char *fn);
 #define inw(p)	({ unsigned int __v = __le16_to_cpu(__raw_readw(p)); __v; })
 #define inl(p)	({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; })
 
-#include <asm/addrspace.h>
-
-/* virt_to_phys will only work when address is in P1 or P2 */
-static inline phys_addr_t virt_to_phys(volatile void *address)
-{
-	return PHYSADDR(address);
-}
-
-static inline void *phys_to_virt(phys_addr_t address)
-{
-	return (void *)P1SEGADDR(address);
-}
-
-#define cached(addr) ((void *)P1SEGADDR(addr))
-#define uncached(addr) ((void *)P2SEGADDR(addr))
+#include <asm/arch/addrspace.h>
+/* Provides virt_to_phys, phys_to_virt, cached, uncached, map_physmem */
 
 #endif /* __KERNEL__ */
 
@@ -95,28 +82,6 @@ static inline void sync(void)
 {
 }
 
-/*
- * Given a physical address and a length, return a virtual address
- * that can be used to access the memory range with the caching
- * properties specified by "flags".
- *
- * This implementation works for memory below 512MiB (flash, etc.) as
- * well as above 3.5GiB (internal peripherals.)
- */
-#define MAP_NOCACHE	(0)
-#define MAP_WRCOMBINE	(1 << 7)
-#define MAP_WRBACK	(MAP_WRCOMBINE | (1 << 9))
-#define MAP_WRTHROUGH	(MAP_WRBACK | (1 << 0))
-
-static inline void *
-map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
-{
-	if (flags == MAP_WRBACK)
-		return (void *)P1SEGADDR(paddr);
-	else
-		return (void *)P2SEGADDR(paddr);
-}
-
 /*
  * Take down a mapping set up by map_physmem().
  */

lib_avr32/bootm.c

@@ -24,7 +24,7 @@
 #include <image.h>
 #include <zlib.h>
 #include <asm/byteorder.h>
-#include <asm/addrspace.h>
+#include <asm/arch/addrspace.h>
 #include <asm/io.h>
 #include <asm/setup.h>
 #include <asm/arch/clk.h>