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@@ -2,6 +2,8 @@
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* (C) Copyright 2007
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* (C) Copyright 2007
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
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*
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*
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+ * Copyright 2010 Freescale Semiconductor, Inc.
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+ *
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* See file CREDITS for list of people who contributed to this
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* See file CREDITS for list of people who contributed to this
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* project.
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* project.
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*
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*
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@@ -861,3 +863,265 @@ void fdt_del_node_and_alias(void *blob, const char *alias)
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off = fdt_path_offset(blob, "/aliases");
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off = fdt_path_offset(blob, "/aliases");
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fdt_delprop(blob, off, alias);
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fdt_delprop(blob, off, alias);
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}
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}
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+
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+/* Helper to read a big number; size is in cells (not bytes) */
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+static inline u64 of_read_number(const __be32 *cell, int size)
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+{
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+ u64 r = 0;
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+ while (size--)
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+ r = (r << 32) | be32_to_cpu(*(cell++));
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+ return r;
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+}
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+
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+static int of_n_cells(const void *blob, int nodeoffset, const char *name)
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+{
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+ int np;
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+ const int *ip;
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+
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+ do {
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+ np = fdt_parent_offset(blob, nodeoffset);
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+
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+ if (np >= 0)
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+ nodeoffset = np;
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+ ip = (int *)fdt_getprop(blob, nodeoffset, name, NULL);
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+ if (ip)
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+ return be32_to_cpup(ip);
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+ } while (np >= 0);
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+
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+ /* No #<NAME>-cells property for the root node */
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+ return 1;
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+}
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+
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+int of_n_addr_cells(const void *blob, int nodeoffset)
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+{
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+ return of_n_cells(blob, nodeoffset, "#address-cells");
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+}
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+
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+int of_n_size_cells(const void *blob, int nodeoffset)
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+{
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+ return of_n_cells(blob, nodeoffset, "#size-cells");
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+}
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+
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+#define PRu64 "%llx"
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+
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+/* Max address size we deal with */
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+#define OF_MAX_ADDR_CELLS 4
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+#define OF_BAD_ADDR ((u64)-1)
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+#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
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+ (ns) > 0)
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+
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+/* Debug utility */
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+#ifdef DEBUG
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+static void of_dump_addr(const char *s, const u32 *addr, int na)
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+{
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+ printf("%s", s);
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+ while(na--)
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+ printf(" %08x", *(addr++));
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+ printf("\n");
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+}
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+#else
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+static void of_dump_addr(const char *s, const u32 *addr, int na) { }
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+#endif
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+
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+/* Callbacks for bus specific translators */
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+struct of_bus {
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+ const char *name;
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+ const char *addresses;
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+ void (*count_cells)(void *blob, int offset,
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+ int *addrc, int *sizec);
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+ u64 (*map)(u32 *addr, const u32 *range,
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+ int na, int ns, int pna);
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+ int (*translate)(u32 *addr, u64 offset, int na);
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+};
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+
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+/* Default translator (generic bus) */
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+static void of_bus_default_count_cells(void *blob, int offset,
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+ int *addrc, int *sizec)
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+{
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+ if (addrc)
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+ *addrc = of_n_addr_cells(blob, offset);
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+ if (sizec)
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+ *sizec = of_n_size_cells(blob, offset);
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+}
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+
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+static u64 of_bus_default_map(u32 *addr, const u32 *range,
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+ int na, int ns, int pna)
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+{
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+ u64 cp, s, da;
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+
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+ cp = of_read_number(range, na);
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+ s = of_read_number(range + na + pna, ns);
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+ da = of_read_number(addr, na);
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+
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+ debug("OF: default map, cp="PRu64", s="PRu64", da="PRu64"\n",
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+ cp, s, da);
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+
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+ if (da < cp || da >= (cp + s))
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+ return OF_BAD_ADDR;
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+ return da - cp;
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+}
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+
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+static int of_bus_default_translate(u32 *addr, u64 offset, int na)
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+{
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+ u64 a = of_read_number(addr, na);
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+ memset(addr, 0, na * 4);
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+ a += offset;
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+ if (na > 1)
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+ addr[na - 2] = a >> 32;
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+ addr[na - 1] = a & 0xffffffffu;
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+
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+ return 0;
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+}
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+
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+/* Array of bus specific translators */
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+static struct of_bus of_busses[] = {
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+ /* Default */
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+ {
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+ .name = "default",
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+ .addresses = "reg",
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+ .count_cells = of_bus_default_count_cells,
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+ .map = of_bus_default_map,
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+ .translate = of_bus_default_translate,
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+ },
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+};
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+
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+static int of_translate_one(void * blob, int parent, struct of_bus *bus,
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+ struct of_bus *pbus, u32 *addr,
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+ int na, int ns, int pna, const char *rprop)
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+{
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+ const u32 *ranges;
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+ int rlen;
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+ int rone;
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+ u64 offset = OF_BAD_ADDR;
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+
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+ /* Normally, an absence of a "ranges" property means we are
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+ * crossing a non-translatable boundary, and thus the addresses
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+ * below the current not cannot be converted to CPU physical ones.
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+ * Unfortunately, while this is very clear in the spec, it's not
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+ * what Apple understood, and they do have things like /uni-n or
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+ * /ht nodes with no "ranges" property and a lot of perfectly
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+ * useable mapped devices below them. Thus we treat the absence of
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+ * "ranges" as equivalent to an empty "ranges" property which means
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+ * a 1:1 translation at that level. It's up to the caller not to try
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+ * to translate addresses that aren't supposed to be translated in
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+ * the first place. --BenH.
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+ */
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+ ranges = (u32 *)fdt_getprop(blob, parent, rprop, &rlen);
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+ if (ranges == NULL || rlen == 0) {
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+ offset = of_read_number(addr, na);
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+ memset(addr, 0, pna * 4);
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+ debug("OF: no ranges, 1:1 translation\n");
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+ goto finish;
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+ }
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+
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+ debug("OF: walking ranges...\n");
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+
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+ /* Now walk through the ranges */
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+ rlen /= 4;
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+ rone = na + pna + ns;
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+ for (; rlen >= rone; rlen -= rone, ranges += rone) {
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+ offset = bus->map(addr, ranges, na, ns, pna);
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+ if (offset != OF_BAD_ADDR)
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+ break;
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+ }
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+ if (offset == OF_BAD_ADDR) {
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+ debug("OF: not found !\n");
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+ return 1;
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+ }
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+ memcpy(addr, ranges + na, 4 * pna);
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+
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+ finish:
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+ of_dump_addr("OF: parent translation for:", addr, pna);
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+ debug("OF: with offset: "PRu64"\n", offset);
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+
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+ /* Translate it into parent bus space */
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+ return pbus->translate(addr, offset, pna);
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+}
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+
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+/*
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+ * Translate an address from the device-tree into a CPU physical address,
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+ * this walks up the tree and applies the various bus mappings on the
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+ * way.
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+ *
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+ * Note: We consider that crossing any level with #size-cells == 0 to mean
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+ * that translation is impossible (that is we are not dealing with a value
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+ * that can be mapped to a cpu physical address). This is not really specified
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+ * that way, but this is traditionally the way IBM at least do things
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+ */
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+u64 __of_translate_address(void *blob, int node_offset, const u32 *in_addr,
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+ const char *rprop)
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+{
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+ int parent;
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+ struct of_bus *bus, *pbus;
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+ u32 addr[OF_MAX_ADDR_CELLS];
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+ int na, ns, pna, pns;
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+ u64 result = OF_BAD_ADDR;
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+
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+ debug("OF: ** translation for device %s **\n",
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+ fdt_get_name(blob, node_offset, NULL));
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+
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+ /* Get parent & match bus type */
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+ parent = fdt_parent_offset(blob, node_offset);
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+ if (parent < 0)
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+ goto bail;
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+ bus = &of_busses[0];
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+
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+ /* Cound address cells & copy address locally */
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+ bus->count_cells(blob, node_offset, &na, &ns);
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+ if (!OF_CHECK_COUNTS(na, ns)) {
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+ printf("%s: Bad cell count for %s\n", __FUNCTION__,
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+ fdt_get_name(blob, node_offset, NULL));
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+ goto bail;
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+ }
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+ memcpy(addr, in_addr, na * 4);
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+
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+ debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
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+ bus->name, na, ns, fdt_get_name(blob, parent, NULL));
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+ of_dump_addr("OF: translating address:", addr, na);
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+
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+ /* Translate */
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+ for (;;) {
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+ /* Switch to parent bus */
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+ node_offset = parent;
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+ parent = fdt_parent_offset(blob, node_offset);
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+
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+ /* If root, we have finished */
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+ if (parent < 0) {
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+ debug("OF: reached root node\n");
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+ result = of_read_number(addr, na);
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+ break;
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+ }
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+
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+ /* Get new parent bus and counts */
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+ pbus = &of_busses[0];
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+ pbus->count_cells(blob, node_offset, &pna, &pns);
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+ if (!OF_CHECK_COUNTS(pna, pns)) {
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+ printf("%s: Bad cell count for %s\n", __FUNCTION__,
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+ fdt_get_name(blob, node_offset, NULL));
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+ break;
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+ }
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+
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+ debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
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+ pbus->name, pna, pns, fdt_get_name(blob, parent, NULL));
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+
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+ /* Apply bus translation */
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+ if (of_translate_one(blob, node_offset, bus, pbus,
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+ addr, na, ns, pna, rprop))
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+ break;
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+
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+ /* Complete the move up one level */
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+ na = pna;
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+ ns = pns;
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+ bus = pbus;
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+
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+ of_dump_addr("OF: one level translation:", addr, na);
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+ }
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+ bail:
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+
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+ return result;
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+}
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+
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+u64 fdt_translate_address(void *blob, int node_offset, const u32 *in_addr)
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+{
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+ return __of_translate_address(blob, node_offset, in_addr, "ranges");
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+}
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