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@@ -28,10 +28,21 @@
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#define USBCTRL_OTGBASE_OFFSET 0x600
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-#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1<<6)
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-#define MX25_USB_CTRL_HSTD_BIT (1<<5)
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-#define MX25_USB_CTRL_USBTE_BIT (1<<4)
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-#define MX25_USB_CTRL_OCPOL_OTG_BIT (1<<3)
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+#define MX25_OTG_SIC_SHIFT 29
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+#define MX25_OTG_SIC_MASK (0x3 << MX25_OTG_SIC_SHIFT)
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+#define MX25_OTG_PM_BIT (1 << 24)
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+#define MX25_OTG_PP_BIT (1 << 11)
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+#define MX25_OTG_OCPOL_BIT (1 << 3)
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+
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+#define MX25_H1_SIC_SHIFT 21
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+#define MX25_H1_SIC_MASK (0x3 << MX25_H1_SIC_SHIFT)
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+#define MX25_H1_PP_BIT (1 << 18)
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+#define MX25_H1_PM_BIT (1 << 8)
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+#define MX25_H1_IPPUE_UP_BIT (1 << 7)
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+#define MX25_H1_IPPUE_DOWN_BIT (1 << 6)
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+#define MX25_H1_TLL_BIT (1 << 5)
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+#define MX25_H1_USBTE_BIT (1 << 4)
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+#define MX25_H1_OCPOL_BIT (1 << 2)
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#define MX31_OTG_SIC_SHIFT 29
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#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
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@@ -51,12 +62,57 @@ static int mxc_set_usbcontrol(int port, unsigned int flags)
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{
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unsigned int v;
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-#if defined(CONFIG_MX25)
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- v = MX25_USB_CTRL_IP_PUE_DOWN_BIT | MX25_USB_CTRL_HSTD_BIT |
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- MX25_USB_CTRL_USBTE_BIT | MX25_USB_CTRL_OCPOL_OTG_BIT;
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-#elif defined(CONFIG_MX31)
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v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
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+#if defined(CONFIG_MX25)
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+ switch (port) {
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+ case 0: /* OTG port */
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+ v &= ~(MX25_OTG_SIC_MASK | MX25_OTG_PM_BIT | MX25_OTG_PP_BIT |
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+ MX25_OTG_OCPOL_BIT);
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+ v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_OTG_SIC_SHIFT;
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+
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+ if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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+ v |= MX25_OTG_PM_BIT;
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+
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+ if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
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+ v |= MX25_OTG_PP_BIT;
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+
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+ if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
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+ v |= MX25_OTG_OCPOL_BIT;
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+
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+ break;
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+ case 1: /* H1 port */
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+ v &= ~(MX25_H1_SIC_MASK | MX25_H1_PM_BIT | MX25_H1_PP_BIT |
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+ MX25_H1_OCPOL_BIT | MX25_H1_TLL_BIT |
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+ MX25_H1_USBTE_BIT | MX25_H1_IPPUE_DOWN_BIT |
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+ MX25_H1_IPPUE_UP_BIT);
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+ v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX25_H1_SIC_SHIFT;
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+
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+ if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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+ v |= MX25_H1_PM_BIT;
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+
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+ if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
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+ v |= MX25_H1_PP_BIT;
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+
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+ if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
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+ v |= MX25_H1_OCPOL_BIT;
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+
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+ if (!(flags & MXC_EHCI_TTL_ENABLED))
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+ v |= MX25_H1_TLL_BIT;
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+
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+ if (flags & MXC_EHCI_INTERNAL_PHY)
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+ v |= MX25_H1_USBTE_BIT;
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+
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+ if (flags & MXC_EHCI_IPPUE_DOWN)
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+ v |= MX25_H1_IPPUE_DOWN_BIT;
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+ if (flags & MXC_EHCI_IPPUE_UP)
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+ v |= MX25_H1_IPPUE_UP_BIT;
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+
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+ break;
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+ default:
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+ return -EINVAL;
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+ }
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+#elif defined(CONFIG_MX31)
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switch (port) {
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case 0: /* OTG port */
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v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
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