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@@ -67,13 +67,13 @@ const unsigned char cfg_simulate_spd_eeprom[128] = {
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0x00, /* Module data width continued: +0 */
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0x04, /* 2.5 Volt */
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0x75, /* SDRAM Cycle Time (cas latency 2.5) = 7.5 ns */
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+ 0x00, /* SDRAM Access from clock */
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#ifdef CONFIG_DDR_ECC
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0x02, /* ECC ON : 02 OFF : 00 */
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#else
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0x00, /* ECC ON : 02 OFF : 00 */
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#endif
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- 0x82, /* refresh Rate Type: Normal (15.625us) + Self refresh */
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- 0,
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+ 0x82, /* refresh Rate Type: Normal (7.8us) + Self refresh */
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0,
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0,
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0x01, /* wcsbc = 1 */
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