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@@ -31,64 +31,20 @@
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#include <watchdog.h>
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#include <command.h>
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#include <asm/processor.h>
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-#include <ppc_asm.tmpl>
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-unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
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-
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-static __inline__ unsigned long get_msr(void)
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-{
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- unsigned long msr;
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-
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- asm volatile("mfmsr %0" : "=r" (msr) :);
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- return msr;
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-}
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-
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-static __inline__ void set_msr(unsigned long msr)
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-{
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- asm volatile("mtmsr %0" : : "r" (msr));
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- asm volatile("isync");
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-}
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-
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-static __inline__ unsigned long get_dec (void)
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-{
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- unsigned long val;
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-
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- asm volatile ("mfdec %0":"=r" (val):);
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-
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- return val;
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-}
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-
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-
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-static __inline__ void set_dec (unsigned long val)
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-{
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- if (val)
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- asm volatile ("mtdec %0"::"r" (val));
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-}
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-
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-void enable_interrupts (void)
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-{
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- set_msr (get_msr() | MSR_EE);
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-}
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-
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-/* returns flag if MSR_EE was set before */
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-int disable_interrupts (void)
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-{
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- ulong msr = get_msr();
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- set_msr (msr & ~MSR_EE);
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- return ((msr & MSR_EE) != 0);
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-}
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-
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-int interrupt_init (void)
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+int interrupt_init_cpu(unsigned long *decrementer_count)
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{
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volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
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pic->gcr = MPC85xx_PICGCR_RST;
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- while (pic->gcr & MPC85xx_PICGCR_RST);
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+ while (pic->gcr & MPC85xx_PICGCR_RST)
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+ ;
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pic->gcr = MPC85xx_PICGCR_M;
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- decrementer_count = get_tbclk() / CFG_HZ;
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+
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+ *decrementer_count = get_tbclk() / CFG_HZ;
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+
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+ /* PIE is same as DIE, dec interrupt enable */
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mtspr(SPRN_TCR, TCR_PIE);
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- set_dec (decrementer_count);
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- set_msr (get_msr () | MSR_EE);
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#ifdef CONFIG_INTERRUPTS
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pic->iivpr1 = 0x810001; /* 50220 enable ecm interrupts */
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@@ -123,9 +79,7 @@ int interrupt_init (void)
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return (0);
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}
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-/*
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- * Install and free a interrupt handler. Not implemented yet.
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- */
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+/* Install and free a interrupt handler. Not implemented yet. */
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void
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irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
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@@ -139,55 +93,16 @@ irq_free_handler(int vec)
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return;
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}
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-/****************************************************************************/
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-
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-
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-volatile ulong timestamp = 0;
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-
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-/*
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- * timer_interrupt - gets called when the decrementer overflows,
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- * with interrupts disabled.
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- * Trivial implementation - no need to be really accurate.
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- */
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-void timer_interrupt(struct pt_regs *regs)
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+void timer_interrupt_cpu(struct pt_regs *regs)
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{
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- timestamp++;
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- set_dec (decrementer_count);
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+ /* PIS is same as DIS, dec interrupt status */
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mtspr(SPRN_TSR, TSR_PIS);
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-#if defined(CONFIG_WATCHDOG)
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- if ((timestamp % 1000) == 0)
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- reset_85xx_watchdog();
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-#endif /* CONFIG_WATCHDOG */
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-}
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-
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-void reset_timer (void)
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-{
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- timestamp = 0;
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-}
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-
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-ulong get_timer (ulong base)
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-{
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- return (timestamp - base);
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-}
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-
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-void set_timer (ulong t)
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-{
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- timestamp = t;
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}
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#if defined(CONFIG_CMD_IRQ)
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-
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-/*******************************************************************************
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- *
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- * irqinfo - print information about PCI devices,not implemented.
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- *
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- */
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-int
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-do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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+/* irqinfo - print information about PCI devices,not implemented. */
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+int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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- printf ("\nInterrupt-unsupported:\n");
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-
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return 0;
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}
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-
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#endif
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