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@@ -42,7 +42,7 @@
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#define QIXIS_DDRCLK_125 0x2
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#define QIXIS_DDRCLK_125 0x2
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#define QIXIS_DDRCLK_133 0x3
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#define QIXIS_DDRCLK_133 0x3
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-#define BRDCFG5_RESET 0x00
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+#define BRDCFG5_IRE 0x20 /* i2c Remote i2c1 enable */
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#define BRDCFG12_SD3EN_MASK 0x20
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#define BRDCFG12_SD3EN_MASK 0x20
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#define BRDCFG12_SD3MX_MASK 0x08
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#define BRDCFG12_SD3MX_MASK 0x08
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