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@@ -756,20 +756,8 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr)
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nand->ecc.read_page = fsl_elbc_read_page;
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nand->ecc.read_page = fsl_elbc_read_page;
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nand->ecc.write_page = fsl_elbc_write_page;
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nand->ecc.write_page = fsl_elbc_write_page;
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-#ifdef CONFIG_FSL_ELBC_FMR
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- priv->fmr = CONFIG_FSL_ELBC_FMR;
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-#else
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priv->fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT);
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priv->fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT);
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- /*
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- * Hardware expects small page has ECCM0, large page has ECCM1
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- * when booting from NAND. Board config can override if not
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- * booting from NAND.
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- */
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- if (or & OR_FCM_PGS)
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- priv->fmr |= FMR_ECCM;
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-#endif
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-
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/* If CS Base Register selects full hardware ECC then use it */
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/* If CS Base Register selects full hardware ECC then use it */
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if ((br & BR_DECC) == BR_DECC_CHK_GEN) {
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if ((br & BR_DECC) == BR_DECC_CHK_GEN) {
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nand->ecc.mode = NAND_ECC_HW;
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nand->ecc.mode = NAND_ECC_HW;
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@@ -786,11 +774,26 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr)
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nand->ecc.mode = NAND_ECC_SOFT;
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nand->ecc.mode = NAND_ECC_SOFT;
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}
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}
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+ ret = nand_scan_ident(mtd, 1, NULL);
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+ if (ret)
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+ return ret;
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+
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/* Large-page-specific setup */
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/* Large-page-specific setup */
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- if (or & OR_FCM_PGS) {
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+ if (mtd->writesize == 2048) {
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+ setbits_be32(&elbc_ctrl->regs->bank[priv->bank].or,
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+ OR_FCM_PGS);
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+ in_be32(&elbc_ctrl->regs->bank[priv->bank].or);
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+
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priv->page_size = 1;
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priv->page_size = 1;
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nand->badblock_pattern = &largepage_memorybased;
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nand->badblock_pattern = &largepage_memorybased;
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+ /*
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+ * Hardware expects small page has ECCM0, large page has
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+ * ECCM1 when booting from NAND, and we follow that even
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+ * when not booting from NAND.
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+ */
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+ priv->fmr |= FMR_ECCM;
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+
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/* adjust ecc setup if needed */
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/* adjust ecc setup if needed */
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if ((br & BR_DECC) == BR_DECC_CHK_GEN) {
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if ((br & BR_DECC) == BR_DECC_CHK_GEN) {
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nand->ecc.steps = 4;
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nand->ecc.steps = 4;
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@@ -798,12 +801,14 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr)
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&fsl_elbc_oob_lp_eccm1 :
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&fsl_elbc_oob_lp_eccm1 :
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&fsl_elbc_oob_lp_eccm0;
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&fsl_elbc_oob_lp_eccm0;
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}
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}
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+ } else if (mtd->writesize == 512) {
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+ clrbits_be32(&elbc_ctrl->regs->bank[priv->bank].or,
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+ OR_FCM_PGS);
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+ in_be32(&elbc_ctrl->regs->bank[priv->bank].or);
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+ } else {
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+ return -ENODEV;
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}
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}
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- ret = nand_scan_ident(mtd, 1, NULL);
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- if (ret)
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- return ret;
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-
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ret = nand_scan_tail(mtd);
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ret = nand_scan_tail(mtd);
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if (ret)
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if (ret)
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return ret;
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return ret;
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