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@@ -50,7 +50,7 @@
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#define EMAC_MDIO_BASE_ADDR (0x01c84000)
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#endif
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-#ifdef CONFIG_SOC_DM646x
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+#ifdef CONFIG_SOC_DM646X
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/* MDIO module input frequency */
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#define EMAC_MDIO_BUS_FREQ 76500000
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/* MDIO clock output frequency */
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@@ -283,7 +283,7 @@ typedef struct {
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/* EMAC Wrapper Registers Structure */
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typedef struct {
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-#if defined(CONFIG_SOC_DM646x) || defined(CONFIG_SOC_DM365)
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+#if defined(CONFIG_SOC_DM646X) || defined(CONFIG_SOC_DM365)
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dv_reg IDVER;
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dv_reg SOFTRST;
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dv_reg EMCTRL;
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