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@@ -0,0 +1,74 @@
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+/*
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+ * include/asm-arm/macro.h
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+ *
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+ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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+ *
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+ * See file CREDITS for list of people who contributed to this
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+ * project.
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+ *
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+ * This program is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of
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+ * the License, or (at your option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software
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+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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+ * MA 02111-1307 USA
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+ */
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+
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+#ifndef __ASM_ARM_MACRO_H__
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+#define __ASM_ARM_MACRO_H__
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+#ifdef __ASSEMBLY__
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+
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+/*
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+ * These macros provide a convenient way to write 8, 16 and 32 bit data
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+ * to any address.
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+ * Registers r4 and r5 are used, any data in these registers are
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+ * overwritten by the macros.
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+ * The macros are valid for any ARM architecture, they do not implement
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+ * any memory barriers so caution is recommended when using these when the
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+ * caches are enabled or on a multi-core system.
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+ */
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+
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+.macro write32, addr, data
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+ ldr r4, =\addr
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+ ldr r5, =\data
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+ str r5, [r4]
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+.endm
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+
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+.macro write16, addr, data
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+ ldr r4, =\addr
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+ ldrh r5, =\data
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+ strh r5, [r4]
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+.endm
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+
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+.macro write8, addr, data
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+ ldr r4, =\addr
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+ ldrb r5, =\data
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+ strb r5, [r4]
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+.endm
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+
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+/*
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+ * This macro generates a loop that can be used for delays in the code.
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+ * Register r4 is used, any data in this register is overwritten by the
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+ * macro.
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+ * The macro is valid for any ARM architeture. The actual time spent in the
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+ * loop will vary from CPU to CPU though.
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+ */
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+
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+.macro wait_timer, time
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+ ldr r4, =\time
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+1:
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+ nop
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+ subs r4, r4, #1
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+ bcs 1b
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+.endm
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+
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+#endif /* __ASSEMBLY__ */
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+#endif /* __ASM_ARM_MACRO_H__ */
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Jean-Christophe PLAGNIOL-VILLARD