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ColdFire: Fix M5329EVB and M5373EVB nand issue

The Nand flash was unable to read and write properly
due to Nand Chip Select (nCE) setup was in reverse
order. Also, increase the Nand time out value to 60.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
TsiChung Liew 16 jaren geleden
bovenliggende
commit
9017d9325a
2 gewijzigde bestanden met toevoegingen van 8 en 4 verwijderingen
  1. 4 2
      board/freescale/m5329evb/nand.c
  2. 4 2
      board/freescale/m5373evb/nand.c

+ 4 - 2
board/freescale/m5329evb/nand.c

@@ -47,10 +47,12 @@ static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
 		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
 
 		IO_ADDR_W &= ~(SET_ALE | SET_CLE);
-		*nCE &= 0xFFFB;
 
 		if (ctrl & NAND_NCE)
+			*nCE &= 0xFFFB;
+		else
 			*nCE |= 0x0004;
+
 		if (ctrl & NAND_CLE)
 			IO_ADDR_W |= SET_CLE;
 		if (ctrl & NAND_ALE)
@@ -78,7 +80,7 @@ int board_nand_init(struct nand_chip *nand)
 	gpio->pclrr_timer = 0;
 	gpio->podr_timer = 0;
 
-	nand->chip_delay = 50;
+	nand->chip_delay = 60;
 	nand->ecc.mode = NAND_ECC_SOFT;
 	nand->cmd_ctrl = nand_hwcontrol;
 

+ 4 - 2
board/freescale/m5373evb/nand.c

@@ -47,10 +47,12 @@ static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
 		ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
 
 		IO_ADDR_W &= ~(SET_ALE | SET_CLE);
-		*nCE &= 0xFFFB;
 
 		if (ctrl & NAND_NCE)
+			*nCE &= 0xFFFB;
+		else
 			*nCE |= 0x0004;
+
 		if (ctrl & NAND_CLE)
 			IO_ADDR_W |= SET_CLE;
 		if (ctrl & NAND_ALE)
@@ -82,7 +84,7 @@ int board_nand_init(struct nand_chip *nand)
 	gpio->pclrr_timer = 0;
 	gpio->podr_timer = 0;
 
-	nand->chip_delay = 50;
+	nand->chip_delay = 60;
 	nand->ecc.mode = NAND_ECC_SOFT;
 	nand->cmd_ctrl = nand_hwcontrol;