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@@ -301,7 +301,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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{
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{
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volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
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volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
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volatile FLASH_WORD_SIZE *addr2;
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volatile FLASH_WORD_SIZE *addr2;
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- int flag, prot, sect, l_sect;
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+ int flag, prot, sect;
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int i;
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int i;
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if ((s_first < 0) || (s_first > s_last)) {
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if ((s_first < 0) || (s_first > s_last)) {
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@@ -331,8 +331,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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printf ("\n");
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printf ("\n");
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}
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}
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- l_sect = -1;
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-
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/* Disable interrupts which might cause a timeout here */
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts ();
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flag = disable_interrupts ();
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@@ -360,7 +358,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
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addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
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addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
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addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
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}
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}
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- l_sect = sect;
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/*
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/*
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* Wait for each sector to complete, it's more
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* Wait for each sector to complete, it's more
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* reliable. According to AMD Spec, you must
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* reliable. According to AMD Spec, you must
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@@ -379,16 +376,6 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
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/* wait at least 80us - let's wait 1 ms */
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/* wait at least 80us - let's wait 1 ms */
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udelay (1000);
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udelay (1000);
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-#if 0
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- /*
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- * We wait for the last triggered sector
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- */
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- if (l_sect < 0)
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- goto DONE;
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- wait_for_DQ7 (info, l_sect);
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-
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-DONE:
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-#endif
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/* reset to read mode */
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/* reset to read mode */
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addr = (FLASH_WORD_SIZE *) info->start[0];
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addr = (FLASH_WORD_SIZE *) info->start[0];
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addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
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addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
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