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@@ -25,12 +25,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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-/*
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- * If we are developing, we might want to start armboot from ram
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- * so we MUST NOT initialize critical regs like mem-timing ...
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- */
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-#define CONFIG_INIT_CRITICAL
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-
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/* ARM asynchronous clock */
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#define AT91C_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
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#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
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@@ -44,7 +38,7 @@
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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-#ifdef CONFIG_INIT_CRITICAL
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+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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#define CFG_USE_MAIN_OSCILLATOR 1
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/* flash */
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#define MC_PUIA_VAL 0x00000000
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@@ -74,7 +68,7 @@
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#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
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#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
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#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
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-#endif /* CONFIG_INIT_CRITICAL */
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+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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/*
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* Size of malloc() pool
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*/
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@@ -177,19 +171,19 @@
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#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
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#else
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#define CFG_ENV_IS_IN_FLASH 1
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-#ifdef CONFIG_INIT_CRITICAL
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+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
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#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x60000) /* after u-boot.bin */
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#define CFG_ENV_SIZE 0x10000 /* sectors are 64K here */
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#else
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#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0xe000) /* between boot.bin and u-boot.bin.gz */
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#define CFG_ENV_SIZE 0x2000 /* 0x8000 */
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-#endif /* CONFIG_INIT_CRITICAL */
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+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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#endif /* CFG_ENV_IS_IN_DATAFLASH */
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#define CFG_LOAD_ADDR 0x21000000 /* default load address */
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-#ifdef CONFIG_INIT_CRITICAL
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+#ifdef CONFIG_SKIP_LOWLEVEL_INIT
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#define CFG_BOOT_SIZE 0x00 /* 0 KBytes */
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#define CFG_U_BOOT_BASE PHYS_FLASH_1
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#define CFG_U_BOOT_SIZE 0x60000 /* 384 KBytes */
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@@ -197,7 +191,7 @@
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#define CFG_BOOT_SIZE 0x6000 /* 24 KBytes */
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#define CFG_U_BOOT_BASE (PHYS_FLASH_1 + 0x10000)
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#define CFG_U_BOOT_SIZE 0x10000 /* 64 KBytes */
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-#endif /* CONFIG_INIT_CRITICAL */
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+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
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#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
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