ARM:AM33XX: Add SPL support for AM335X EVM

This patch is added to support SPL feature on AM335X
platform. In this patch, MMC1 is configured as boot
device for SPL and support for other devices will be
added in the next patch series.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>

arch/arm/cpu/armv7/am33xx/Makefile

@@ -16,8 +16,6 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).o
 
-SOBJS	:= lowlevel_init.o
-
 COBJS	+= clock.o
 COBJS	+= sys_info.o
 COBJS	+= ddr.o

arch/arm/cpu/armv7/am33xx/board.c

@@ -19,19 +19,31 @@
 #include <common.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
+#include <asm/arch/omap.h>
 #include <asm/arch/ddr_defs.h>
 #include <asm/arch/clock.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/common_def.h>
 #include <asm/io.h>
+#include <asm/omap_common.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
 struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
 struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
+struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
+
+/* UART Defines */
+#ifdef CONFIG_SPL_BUILD
+#define UART_RESET		(0x1 << 1)
+#define UART_CLK_RUNNING_MASK	0x1
+#define UART_SMART_IDLE_EN	(0x1 << 0x3)
+#endif
 
 /*
  * early system init of muxing and clocks.
  */
-void s_init(u32 in_ddr)
+void s_init(void)
 {
 	/* WDT1 is already running when the bootloader gets control
 	 * Disable it to avoid "random" resets
@@ -43,12 +55,37 @@ void s_init(u32 in_ddr)
 	while (readl(&wdtimer->wdtwwps) != 0x0)
 		;
 
+#ifdef CONFIG_SPL_BUILD
 	/* Setup the PLLs and the clocks for the peripherals */
-#ifdef CONFIG_SETUP_PLL
 	pll_init();
+
+	/* UART softreset */
+	u32 regVal;
+
+	enable_uart0_pin_mux();
+
+	regVal = readl(&uart_base->uartsyscfg);
+	regVal |= UART_RESET;
+	writel(regVal, &uart_base->uartsyscfg);
+	while ((readl(&uart_base->uartsyssts) &
+		UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK)
+		;
+
+	/* Disable smart idle */
+	regVal = readl(&uart_base->uartsyscfg);
+	regVal |= UART_SMART_IDLE_EN;
+	writel(regVal, &uart_base->uartsyscfg);
+
+	/* Initialize the Timer */
+	init_timer();
+
+	preloader_console_init();
+
+	config_ddr();
 #endif
-	if (!in_ddr)
-		config_ddr();
+
+	/* Enable MMC0 */
+	enable_mmc0_pin_mux();
 }
 
 /* Initialize timer */
@@ -71,3 +108,9 @@ int board_mmc_init(bd_t *bis)
 	return omap_mmc_init(0);
 }
 #endif
+
+void setup_clocks_for_console(void)
+{
+	/* Not yet implemented */
+	return;
+}

arch/arm/cpu/armv7/am33xx/config.mk

@@ -0,0 +1,18 @@
+#
+# Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed "as is" WITHOUT ANY WARRANTY of any
+# kind, whether express or implied; without even the implied warranty
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+ifdef CONFIG_SPL_BUILD
+ALL-y	+= $(OBJTREE)/MLO
+else
+ALL-y	+= $(obj)u-boot.img
+endif

arch/arm/cpu/armv7/am33xx/emif4.c

@@ -46,7 +46,7 @@ void dram_init_banksize(void)
 }
 
 
-#ifdef CONFIG_AM335X_CONFIG_DDR
+#ifdef CONFIG_SPL_BUILD
 static void data_macro_config(int dataMacroNum)
 {
 	struct ddr_data data;

arch/arm/cpu/armv7/am33xx/lowlevel_init.S

@@ -1,72 +0,0 @@
-/*
- * lowlevel_init.S
- *
- * AM33XX low level initialization.
- *
- * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
- *
- * Initial Code by:
- * Mansoor Ahamed  <mansoor.ahamed@ti.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <config.h>
-#include <asm/arch/hardware.h>
-
-_mark1:
-	.word mark1
-_lowlevel_init1:
-	.word lowlevel_init
-_s_init_start:
-	.word s_init_start
-
-_TEXT_BASE:
-	.word	CONFIG_SYS_TEXT_BASE	/* sdram load addr from config.mk */
-
-/*****************************************************************************
- * lowlevel_init: - Platform low level init.
- ****************************************************************************/
-.globl lowlevel_init
-lowlevel_init:
-
-	/* The link register is saved in ip by start.S */
-	mov r6, ip
-	/* check if we are already running from RAM */
-	ldr r2, _lowlevel_init1
-	ldr r3, _TEXT_BASE
-	sub r4, r2, r3
-	sub r0, pc, r4
-	ldr sp, SRAM_STACK
-mark1:
-	ldr r5, _mark1
-	sub r5, r5, r2 /* bytes between mark1 and lowlevel_init */
-	sub r0, r0, r5 /* r0 <- _start w.r.t current place of execution */
-	mov r10, #0x0 /* r10 has in_ddr used by s_init() */
-
-	ands r0, r0, #0xC0000000
-	/* MSB 2 bits <> 0 then we are in ocmc or DDR */
-	cmp r0, #0x80000000
-	bne s_init_start
-	mov r10, #0x01
-	b s_init_start
-
-s_init_start:
-	mov r0, r10 /* passing in_ddr in r0 */
-	bl s_init
-	/* back to arch calling code */
-	mov pc, r6
-	/* the literal pools origin */
-	.ltorg
-
-SRAM_STACK:
-	/* Place stack at the top */
-	.word LOW_LEVEL_SRAM_STACK

arch/arm/cpu/armv7/omap-common/Makefile

@@ -37,6 +37,10 @@ ifneq ($(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
 COBJS	+= hwinit-common.o
 COBJS	+= clocks-common.o
 COBJS	+= emif-common.o
+endif
+
+ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
+COBJS	+= boot-common.o
 SOBJS	+= lowlevel_init.o
 endif
 

arch/arm/cpu/armv7/omap-common/boot-common.c

@@ -0,0 +1,49 @@
+/*
+ * boot-common.c
+ *
+ * Common bootmode functions for omap based boards
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <asm/omap_common.h>
+#include <asm/arch/omap.h>
+
+/*
+ * This is used to verify if the configuration header
+ * was executed by rom code prior to control of transfer
+ * to the bootloader. SPL is responsible for saving and
+ * passing the boot_params pointer to the u-boot.
+ */
+struct omap_boot_parameters boot_params __attribute__ ((section(".data")));
+
+#ifdef CONFIG_SPL_BUILD
+/*
+ * We use static variables because global data is not ready yet.
+ * Initialized data is available in SPL right from the beginning.
+ * We would not typically need to save these parameters in regular
+ * U-Boot. This is needed only in SPL at the moment.
+ */
+u32 omap_bootmode = MMCSD_MODE_FAT;
+
+u32 omap_boot_device(void)
+{
+	return (u32) (boot_params.omap_bootdevice);
+}
+
+u32 omap_boot_mode(void)
+{
+	return omap_bootmode;
+}
+#endif

arch/arm/cpu/armv7/omap-common/hwinit-common.c

@@ -35,34 +35,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-/*
- * This is used to verify if the configuration header
- * was executed by rom code prior to control of transfer
- * to the bootloader. SPL is responsible for saving and
- * passing the boot_params pointer to the u-boot.
- */
-struct omap_boot_parameters boot_params __attribute__ ((section(".data")));
-
-#ifdef CONFIG_SPL_BUILD
-/*
- * We use static variables because global data is not ready yet.
- * Initialized data is available in SPL right from the beginning.
- * We would not typically need to save these parameters in regular
- * U-Boot. This is needed only in SPL at the moment.
- */
-u32 omap_bootmode = MMCSD_MODE_FAT;
-
-u32 omap_boot_device(void)
-{
-	return (u32) (boot_params.omap_bootdevice);
-}
-
-u32 omap_boot_mode(void)
-{
-	return omap_bootmode;
-}
-#endif
-
 void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
 {
 	int i;

board/ti/am335x/common_def.h → arch/arm/include/asm/arch-am33xx/common_def.h

@@ -17,8 +17,6 @@
 #define __COMMON_DEF_H__
 
 extern void enable_uart0_pin_mux(void);
-extern void configure_evm_pin_mux(unsigned char daughter_board_id,
-					unsigned short daughter_board_profile,
-					unsigned char daughter_board_flag);
+extern void enable_mmc0_pin_mux(void);
 
 #endif/*__COMMON_DEF_H__ */

arch/arm/include/asm/arch-am33xx/omap.h

@@ -0,0 +1,59 @@
+/*
+ * omap.h
+ *
+ * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * Author:
+ *	Chandan Nath <chandan.nath@ti.com>
+ *
+ * Derived from OMAP4 work by
+ *	Aneesh V <aneesh@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _OMAP_H_
+#define _OMAP_H_
+
+/*
+ * Non-secure SRAM Addresses
+ * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE
+ * at 0x40304000(EMU base) so that our code works for both EMU and GP
+ */
+#define NON_SECURE_SRAM_START	0x40304000
+#define NON_SECURE_SRAM_END	0x4030E000
+#define LOW_LEVEL_SRAM_STACK	0x4030B7FC
+
+/* ROM code defines */
+/* Boot device */
+#define BOOT_DEVICE_MASK	0xFF
+#define BOOT_DEVICE_OFFSET	0x8
+#define DEV_DESC_PTR_OFFSET	0x4
+#define DEV_DATA_PTR_OFFSET	0x18
+#define BOOT_MODE_OFFSET	0x8
+#define RESET_REASON_OFFSET	0x9
+#define CH_FLAGS_OFFSET		0xA
+
+#define CH_FLAGS_CHSETTINGS	(0x1 << 0)
+#define CH_FLAGS_CHRAM		(0x1 << 1)
+#define CH_FLAGS_CHFLASH	(0x1 << 2)
+#define CH_FLAGS_CHMMCSD	(0x1 << 3)
+
+#ifndef __ASSEMBLY__
+struct omap_boot_parameters {
+	char *boot_message;
+	unsigned int mem_boot_descriptor;
+	unsigned char omap_bootdevice;
+	unsigned char reset_reason;
+	unsigned char ch_flags;
+};
+#endif
+#endif

arch/arm/include/asm/arch-am33xx/sys_proto.h

@@ -29,4 +29,5 @@ int print_cpuinfo(void);
 #endif
 
 u32 get_device_type(void);
+void setup_clocks_for_console(void);
 #endif

arch/arm/include/asm/omap_common.h

@@ -62,6 +62,11 @@ void preloader_console_init(void);
 #define BOOT_DEVICE_MMC2	5 /*emmc*/
 #define BOOT_DEVICE_MMC1	6
 #define BOOT_DEVICE_XIPWAIT	7
+#elif defined(CONFIG_AM33XX)	/* AM33XX */
+#define BOOT_DEVICE_NAND	5
+#define BOOT_DEVICE_MMC1	8
+#define BOOT_DEVICE_MMC2	0
+#define BOOT_DEVICE_UART	65
 #endif
 
 /* Boot type */

board/ti/am335x/evm.c

@@ -16,7 +16,7 @@
 #include <common.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
-#include "common_def.h"
+#include <asm/arch/common_def.h>
 #include <serial.h>
 
 DECLARE_GLOBAL_DATA_PTR;

board/ti/am335x/mux.c

@@ -14,7 +14,7 @@
  */
 
 #include <config.h>
-#include "common_def.h"
+#include <asm/arch/common_def.h>
 #include <asm/arch/hardware.h>
 #include <asm/io.h>
 

include/configs/am335x_evm.h

@@ -26,8 +26,6 @@
 #include <asm/arch/cpu.h>
 #include <asm/arch/hardware.h>
 
-#define CONFIG_SETUP_PLL
-#define CONFIG_AM335X_CONFIG_DDR
 #define CONFIG_ENV_SIZE			0x400
 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (8 * 1024))
 #define CONFIG_SYS_PROMPT		"U-Boot# "
@@ -118,7 +116,44 @@
 
 #define CONFIG_ENV_IS_NOWHERE
 
-#define CONFIG_SYS_TEXT_BASE		0x402f0400
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_TEXT_BASE		0x402F0400
+#define CONFIG_SPL_MAX_SIZE		(46 * 1024)
+#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR	0x80000000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+/*
+ * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
+ * 64 bytes before this address should be set aside for u-boot.img's
+ * header. That is 0x800FFFC0--0x80100000 should not be used for any
+ * other needs.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80800000
+#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
+
+/* Since SPL did pll and ddr initialization for us,
+ * we don't need to do it twice.
+ */
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
 
 /* Unsupported features */
 #undef CONFIG_USE_IRQ

spl/Makefile

@@ -58,13 +58,7 @@ LIBS-$(CONFIG_SPL_ONENAND_SUPPORT) += drivers/mtd/onenand/libonenand.o
 LIBS-$(CONFIG_SPL_DMA_SUPPORT) += drivers/dma/libdma.o
 LIBS-$(CONFIG_SPL_POST_MEM_SUPPORT) += post/drivers/memory.o
 
-ifeq ($(SOC),omap3)
-LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
-endif
-ifeq ($(SOC),omap4)
-LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
-endif
-ifeq ($(SOC),omap5)
+ifneq ($(CONFIG_AM33XX)$(CONFIG_OMAP34XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX),)
 LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
 endif
 
@@ -104,6 +98,11 @@ $(OBJTREE)/MLO:	$(obj)u-boot-spl.bin
 	$(OBJTREE)/tools/mkimage -T omapimage \
 		-a $(CONFIG_SPL_TEXT_BASE) -d $< $@
 endif
+ifdef CONFIG_AM33XX
+$(OBJTREE)/MLO:	$(obj)u-boot-spl.bin
+	$(OBJTREE)/tools/mkimage -T omapimage \
+		-a $(CONFIG_SPL_TEXT_BASE) -d $< $@
+endif
 
 ALL-y	+= $(obj)u-boot-spl.bin